/***************************************************************************
 *             __________               __   ___.
 *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
 *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
 *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
 *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
 *                     \/            \/     \/    \/            \/
 * This file was automatically generated by headergen, DO NOT EDIT it.
 * headergen version: 3.0.0
 * imx233 version: 2.4.0
 * imx233 authors: Amaury Pouly
 *
 * Copyright (C) 2015 by the authors
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
 * KIND, either express or implied.
 *
 ****************************************************************************/
#ifndef __HEADERGEN_IMX233_BCH_H__
#define __HEADERGEN_IMX233_BCH_H__

#define HW_BCH_CTRL                             HW(BCH_CTRL)
#define HWA_BCH_CTRL                            (0x8000a000 + 0x0)
#define HWT_BCH_CTRL                            HWIO_32_RW
#define HWN_BCH_CTRL                            BCH_CTRL
#define HWI_BCH_CTRL                            
#define HW_BCH_CTRL_SET                         HW(BCH_CTRL_SET)
#define HWA_BCH_CTRL_SET                        (HWA_BCH_CTRL + 0x4)
#define HWT_BCH_CTRL_SET                        HWIO_32_WO
#define HWN_BCH_CTRL_SET                        BCH_CTRL
#define HWI_BCH_CTRL_SET                        
#define HW_BCH_CTRL_CLR                         HW(BCH_CTRL_CLR)
#define HWA_BCH_CTRL_CLR                        (HWA_BCH_CTRL + 0x8)
#define HWT_BCH_CTRL_CLR                        HWIO_32_WO
#define HWN_BCH_CTRL_CLR                        BCH_CTRL
#define HWI_BCH_CTRL_CLR                        
#define HW_BCH_CTRL_TOG                         HW(BCH_CTRL_TOG)
#define HWA_BCH_CTRL_TOG                        (HWA_BCH_CTRL + 0xc)
#define HWT_BCH_CTRL_TOG                        HWIO_32_WO
#define HWN_BCH_CTRL_TOG                        BCH_CTRL
#define HWI_BCH_CTRL_TOG                        
#define BP_BCH_CTRL_SFTRST                      31
#define BM_BCH_CTRL_SFTRST                      0x80000000
#define BV_BCH_CTRL_SFTRST__RUN                 0x0
#define BV_BCH_CTRL_SFTRST__RESET               0x1
#define BF_BCH_CTRL_SFTRST(v)                   (((v) & 0x1) << 31)
#define BFM_BCH_CTRL_SFTRST(v)                  BM_BCH_CTRL_SFTRST
#define BF_BCH_CTRL_SFTRST_V(e)                 BF_BCH_CTRL_SFTRST(BV_BCH_CTRL_SFTRST__##e)
#define BFM_BCH_CTRL_SFTRST_V(v)                BM_BCH_CTRL_SFTRST
#define BP_BCH_CTRL_CLKGATE                     30
#define BM_BCH_CTRL_CLKGATE                     0x40000000
#define BV_BCH_CTRL_CLKGATE__RUN                0x0
#define BV_BCH_CTRL_CLKGATE__NO_CLKS            0x1
#define BF_BCH_CTRL_CLKGATE(v)                  (((v) & 0x1) << 30)
#define BFM_BCH_CTRL_CLKGATE(v)                 BM_BCH_CTRL_CLKGATE
#define BF_BCH_CTRL_CLKGATE_V(e)                BF_BCH_CTRL_CLKGATE(BV_BCH_CTRL_CLKGATE__##e)
#define BFM_BCH_CTRL_CLKGATE_V(v)               BM_BCH_CTRL_CLKGATE
#define BP_BCH_CTRL_RSVD5                       23
#define BM_BCH_CTRL_RSVD5                       0x3f800000
#define BF_BCH_CTRL_RSVD5(v)                    (((v) & 0x7f) << 23)
#define BFM_BCH_CTRL_RSVD5(v)                   BM_BCH_CTRL_RSVD5
#define BF_BCH_CTRL_RSVD5_V(e)                  BF_BCH_CTRL_RSVD5(BV_BCH_CTRL_RSVD5__##e)
#define BFM_BCH_CTRL_RSVD5_V(v)                 BM_BCH_CTRL_RSVD5
#define BP_BCH_CTRL_DEBUGSYNDROME               22
#define BM_BCH_CTRL_DEBUGSYNDROME               0x400000
#define BF_BCH_CTRL_DEBUGSYNDROME(v)            (((v) & 0x1) << 22)
#define BFM_BCH_CTRL_DEBUGSYNDROME(v)           BM_BCH_CTRL_DEBUGSYNDROME
#define BF_BCH_CTRL_DEBUGSYNDROME_V(e)          BF_BCH_CTRL_DEBUGSYNDROME(BV_BCH_CTRL_DEBUGSYNDROME__##e)
#define BFM_BCH_CTRL_DEBUGSYNDROME_V(v)         BM_BCH_CTRL_DEBUGSYNDROME
#define BP_BCH_CTRL_RSVD4                       20
#define BM_BCH_CTRL_RSVD4                       0x300000
#define BF_BCH_CTRL_RSVD4(v)                    (((v) & 0x3) << 20)
#define BFM_BCH_CTRL_RSVD4(v)                   BM_BCH_CTRL_RSVD4
#define BF_BCH_CTRL_RSVD4_V(e)                  BF_BCH_CTRL_RSVD4(BV_BCH_CTRL_RSVD4__##e)
#define BFM_BCH_CTRL_RSVD4_V(v)                 BM_BCH_CTRL_RSVD4
#define BP_BCH_CTRL_M2M_LAYOUT                  18
#define BM_BCH_CTRL_M2M_LAYOUT                  0xc0000
#define BF_BCH_CTRL_M2M_LAYOUT(v)               (((v) & 0x3) << 18)
#define BFM_BCH_CTRL_M2M_LAYOUT(v)              BM_BCH_CTRL_M2M_LAYOUT
#define BF_BCH_CTRL_M2M_LAYOUT_V(e)             BF_BCH_CTRL_M2M_LAYOUT(BV_BCH_CTRL_M2M_LAYOUT__##e)
#define BFM_BCH_CTRL_M2M_LAYOUT_V(v)            BM_BCH_CTRL_M2M_LAYOUT
#define BP_BCH_CTRL_M2M_ENCODE                  17
#define BM_BCH_CTRL_M2M_ENCODE                  0x20000
#define BF_BCH_CTRL_M2M_ENCODE(v)               (((v) & 0x1) << 17)
#define BFM_BCH_CTRL_M2M_ENCODE(v)              BM_BCH_CTRL_M2M_ENCODE
#define BF_BCH_CTRL_M2M_ENCODE_V(e)             BF_BCH_CTRL_M2M_ENCODE(BV_BCH_CTRL_M2M_ENCODE__##e)
#define BFM_BCH_CTRL_M2M_ENCODE_V(v)            BM_BCH_CTRL_M2M_ENCODE
#define BP_BCH_CTRL_M2M_ENABLE                  16
#define BM_BCH_CTRL_M2M_ENABLE                  0x10000
#define BF_BCH_CTRL_M2M_ENABLE(v)               (((v) & 0x1) << 16)
#define BFM_BCH_CTRL_M2M_ENABLE(v)              BM_BCH_CTRL_M2M_ENABLE
#define BF_BCH_CTRL_M2M_ENABLE_V(e)             BF_BCH_CTRL_M2M_ENABLE(BV_BCH_CTRL_M2M_ENABLE__##e)
#define BFM_BCH_CTRL_M2M_ENABLE_V(v)            BM_BCH_CTRL_M2M_ENABLE
#define BP_BCH_CTRL_RSVD3                       11
#define BM_BCH_CTRL_RSVD3                       0xf800
#define BF_BCH_CTRL_RSVD3(v)                    (((v) & 0x1f) << 11)
#define BFM_BCH_CTRL_RSVD3(v)                   BM_BCH_CTRL_RSVD3
#define BF_BCH_CTRL_RSVD3_V(e)                  BF_BCH_CTRL_RSVD3(BV_BCH_CTRL_RSVD3__##e)
#define BFM_BCH_CTRL_RSVD3_V(v)                 BM_BCH_CTRL_RSVD3
#define BP_BCH_CTRL_DEBUG_STALL_IRQ_EN          10
#define BM_BCH_CTRL_DEBUG_STALL_IRQ_EN          0x400
#define BF_BCH_CTRL_DEBUG_STALL_IRQ_EN(v)       (((v) & 0x1) << 10)
#define BFM_BCH_CTRL_DEBUG_STALL_IRQ_EN(v)      BM_BCH_CTRL_DEBUG_STALL_IRQ_EN
#define BF_BCH_CTRL_DEBUG_STALL_IRQ_EN_V(e)     BF_BCH_CTRL_DEBUG_STALL_IRQ_EN(BV_BCH_CTRL_DEBUG_STALL_IRQ_EN__##e)
#define BFM_BCH_CTRL_DEBUG_STALL_IRQ_EN_V(v)    BM_BCH_CTRL_DEBUG_STALL_IRQ_EN
#define BP_BCH_CTRL_RSVD2                       9
#define BM_BCH_CTRL_RSVD2                       0x200
#define BF_BCH_CTRL_RSVD2(v)                    (((v) & 0x1) << 9)
#define BFM_BCH_CTRL_RSVD2(v)                   BM_BCH_CTRL_RSVD2
#define BF_BCH_CTRL_RSVD2_V(e)                  BF_BCH_CTRL_RSVD2(BV_BCH_CTRL_RSVD2__##e)
#define BFM_BCH_CTRL_RSVD2_V(v)                 BM_BCH_CTRL_RSVD2
#define BP_BCH_CTRL_COMPLETE_IRQ_EN             8
#define BM_BCH_CTRL_COMPLETE_IRQ_EN             0x100
#define BF_BCH_CTRL_COMPLETE_IRQ_EN(v)          (((v) & 0x1) << 8)
#define BFM_BCH_CTRL_COMPLETE_IRQ_EN(v)         BM_BCH_CTRL_COMPLETE_IRQ_EN
#define BF_BCH_CTRL_COMPLETE_IRQ_EN_V(e)        BF_BCH_CTRL_COMPLETE_IRQ_EN(BV_BCH_CTRL_COMPLETE_IRQ_EN__##e)
#define BFM_BCH_CTRL_COMPLETE_IRQ_EN_V(v)       BM_BCH_CTRL_COMPLETE_IRQ_EN
#define BP_BCH_CTRL_RSVD1                       4
#define BM_BCH_CTRL_RSVD1                       0xf0
#define BF_BCH_CTRL_RSVD1(v)                    (((v) & 0xf) << 4)
#define BFM_BCH_CTRL_RSVD1(v)                   BM_BCH_CTRL_RSVD1
#define BF_BCH_CTRL_RSVD1_V(e)                  BF_BCH_CTRL_RSVD1(BV_BCH_CTRL_RSVD1__##e)
#define BFM_BCH_CTRL_RSVD1_V(v)                 BM_BCH_CTRL_RSVD1
#define BP_BCH_CTRL_BM_ERROR_IRQ                3
#define BM_BCH_CTRL_BM_ERROR_IRQ                0x8
#define BF_BCH_CTRL_BM_ERROR_IRQ(v)             (((v) & 0x1) << 3)
#define BFM_BCH_CTRL_BM_ERROR_IRQ(v)            BM_BCH_CTRL_BM_ERROR_IRQ
#define BF_BCH_CTRL_BM_ERROR_IRQ_V(e)           BF_BCH_CTRL_BM_ERROR_IRQ(BV_BCH_CTRL_BM_ERROR_IRQ__##e)
#define BFM_BCH_CTRL_BM_ERROR_IRQ_V(v)          BM_BCH_CTRL_BM_ERROR_IRQ
#define BP_BCH_CTRL_DEBUG_STALL_IRQ             2
#define BM_BCH_CTRL_DEBUG_STALL_IRQ             0x4
#define BF_BCH_CTRL_DEBUG_STALL_IRQ(v)          (((v) & 0x1) << 2)
#define BFM_BCH_CTRL_DEBUG_STALL_IRQ(v)         BM_BCH_CTRL_DEBUG_STALL_IRQ
#define BF_BCH_CTRL_DEBUG_STALL_IRQ_V(e)        BF_BCH_CTRL_DEBUG_STALL_IRQ(BV_BCH_CTRL_DEBUG_STALL_IRQ__##e)
#define BFM_BCH_CTRL_DEBUG_STALL_IRQ_V(v)       BM_BCH_CTRL_DEBUG_STALL_IRQ
#define BP_BCH_CTRL_RSVD0                       1
#define BM_BCH_CTRL_RSVD0                       0x2
#define BF_BCH_CTRL_RSVD0(v)                    (((v) & 0x1) << 1)
#define BFM_BCH_CTRL_RSVD0(v)                   BM_BCH_CTRL_RSVD0
#define BF_BCH_CTRL_RSVD0_V(e)                  BF_BCH_CTRL_RSVD0(BV_BCH_CTRL_RSVD0__##e)
#define BFM_BCH_CTRL_RSVD0_V(v)                 BM_BCH_CTRL_RSVD0
#define BP_BCH_CTRL_COMPLETE_IRQ                0
#define BM_BCH_CTRL_COMPLETE_IRQ                0x1
#define BF_BCH_CTRL_COMPLETE_IRQ(v)             (((v) & 0x1) << 0)
#define BFM_BCH_CTRL_COMPLETE_IRQ(v)            BM_BCH_CTRL_COMPLETE_IRQ
#define BF_BCH_CTRL_COMPLETE_IRQ_V(e)           BF_BCH_CTRL_COMPLETE_IRQ(BV_BCH_CTRL_COMPLETE_IRQ__##e)
#define BFM_BCH_CTRL_COMPLETE_IRQ_V(v)          BM_BCH_CTRL_COMPLETE_IRQ

#define HW_BCH_STATUS0                              HW(BCH_STATUS0)
#define HWA_BCH_STATUS0                             (0x8000a000 + 0x10)
#define HWT_BCH_STATUS0                             HWIO_32_RW
#define HWN_BCH_STATUS0                             BCH_STATUS0
#define HWI_BCH_STATUS0                             
#define BP_BCH_STATUS0_HANDLE                       20
#define BM_BCH_STATUS0_HANDLE                       0xfff00000
#define BF_BCH_STATUS0_HANDLE(v)                    (((v) & 0xfff) << 20)
#define BFM_BCH_STATUS0_HANDLE(v)                   BM_BCH_STATUS0_HANDLE
#define BF_BCH_STATUS0_HANDLE_V(e)                  BF_BCH_STATUS0_HANDLE(BV_BCH_STATUS0_HANDLE__##e)
#define BFM_BCH_STATUS0_HANDLE_V(v)                 BM_BCH_STATUS0_HANDLE
#define BP_BCH_STATUS0_COMPLETED_CE                 16
#define BM_BCH_STATUS0_COMPLETED_CE                 0xf0000
#define BF_BCH_STATUS0_COMPLETED_CE(v)              (((v) & 0xf) << 16)
#define BFM_BCH_STATUS0_COMPLETED_CE(v)             BM_BCH_STATUS0_COMPLETED_CE
#define BF_BCH_STATUS0_COMPLETED_CE_V(e)            BF_BCH_STATUS0_COMPLETED_CE(BV_BCH_STATUS0_COMPLETED_CE__##e)
#define BFM_BCH_STATUS0_COMPLETED_CE_V(v)           BM_BCH_STATUS0_COMPLETED_CE
#define BP_BCH_STATUS0_STATUS_BLK0                  8
#define BM_BCH_STATUS0_STATUS_BLK0                  0xff00
#define BV_BCH_STATUS0_STATUS_BLK0__ZERO            0x0
#define BV_BCH_STATUS0_STATUS_BLK0__ERROR1          0x1
#define BV_BCH_STATUS0_STATUS_BLK0__ERROR2          0x2
#define BV_BCH_STATUS0_STATUS_BLK0__ERROR3          0x3
#define BV_BCH_STATUS0_STATUS_BLK0__ERROR4          0x4
#define BV_BCH_STATUS0_STATUS_BLK0__UNCORRECTABLE   0xfe
#define BV_BCH_STATUS0_STATUS_BLK0__ERASED          0xff
#define BF_BCH_STATUS0_STATUS_BLK0(v)               (((v) & 0xff) << 8)
#define BFM_BCH_STATUS0_STATUS_BLK0(v)              BM_BCH_STATUS0_STATUS_BLK0
#define BF_BCH_STATUS0_STATUS_BLK0_V(e)             BF_BCH_STATUS0_STATUS_BLK0(BV_BCH_STATUS0_STATUS_BLK0__##e)
#define BFM_BCH_STATUS0_STATUS_BLK0_V(v)            BM_BCH_STATUS0_STATUS_BLK0
#define BP_BCH_STATUS0_RSVD1                        5
#define BM_BCH_STATUS0_RSVD1                        0xe0
#define BF_BCH_STATUS0_RSVD1(v)                     (((v) & 0x7) << 5)
#define BFM_BCH_STATUS0_RSVD1(v)                    BM_BCH_STATUS0_RSVD1
#define BF_BCH_STATUS0_RSVD1_V(e)                   BF_BCH_STATUS0_RSVD1(BV_BCH_STATUS0_RSVD1__##e)
#define BFM_BCH_STATUS0_RSVD1_V(v)                  BM_BCH_STATUS0_RSVD1
#define BP_BCH_STATUS0_ALLONES                      4
#define BM_BCH_STATUS0_ALLONES                      0x10
#define BF_BCH_STATUS0_ALLONES(v)                   (((v) & 0x1) << 4)
#define BFM_BCH_STATUS0_ALLONES(v)                  BM_BCH_STATUS0_ALLONES
#define BF_BCH_STATUS0_ALLONES_V(e)                 BF_BCH_STATUS0_ALLONES(BV_BCH_STATUS0_ALLONES__##e)
#define BFM_BCH_STATUS0_ALLONES_V(v)                BM_BCH_STATUS0_ALLONES
#define BP_BCH_STATUS0_CORRECTED                    3
#define BM_BCH_STATUS0_CORRECTED                    0x8
#define BF_BCH_STATUS0_CORRECTED(v)                 (((v) & 0x1) << 3)
#define BFM_BCH_STATUS0_CORRECTED(v)                BM_BCH_STATUS0_CORRECTED
#define BF_BCH_STATUS0_CORRECTED_V(e)               BF_BCH_STATUS0_CORRECTED(BV_BCH_STATUS0_CORRECTED__##e)
#define BFM_BCH_STATUS0_CORRECTED_V(v)              BM_BCH_STATUS0_CORRECTED
#define BP_BCH_STATUS0_UNCORRECTABLE                2
#define BM_BCH_STATUS0_UNCORRECTABLE                0x4
#define BF_BCH_STATUS0_UNCORRECTABLE(v)             (((v) & 0x1) << 2)
#define BFM_BCH_STATUS0_UNCORRECTABLE(v)            BM_BCH_STATUS0_UNCORRECTABLE
#define BF_BCH_STATUS0_UNCORRECTABLE_V(e)           BF_BCH_STATUS0_UNCORRECTABLE(BV_BCH_STATUS0_UNCORRECTABLE__##e)
#define BFM_BCH_STATUS0_UNCORRECTABLE_V(v)          BM_BCH_STATUS0_UNCORRECTABLE
#define BP_BCH_STATUS0_RSVD0                        0
#define BM_BCH_STATUS0_RSVD0                        0x3
#define BF_BCH_STATUS0_RSVD0(v)                     (((v) & 0x3) << 0)
#define BFM_BCH_STATUS0_RSVD0(v)                    BM_BCH_STATUS0_RSVD0
#define BF_BCH_STATUS0_RSVD0_V(e)                   BF_BCH_STATUS0_RSVD0(BV_BCH_STATUS0_RSVD0__##e)
#define BFM_BCH_STATUS0_RSVD0_V(v)                  BM_BCH_STATUS0_RSVD0

#define HW_BCH_MODE                         HW(BCH_MODE)
#define HWA_BCH_MODE                        (0x8000a000 + 0x20)
#define HWT_BCH_MODE                        HWIO_32_RW
#define HWN_BCH_MODE                        BCH_MODE
#define HWI_BCH_MODE                        
#define BP_BCH_MODE_RSVD                    8
#define BM_BCH_MODE_RSVD                    0xffffff00
#define BF_BCH_MODE_RSVD(v)                 (((v) & 0xffffff) << 8)
#define BFM_BCH_MODE_RSVD(v)                BM_BCH_MODE_RSVD
#define BF_BCH_MODE_RSVD_V(e)               BF_BCH_MODE_RSVD(BV_BCH_MODE_RSVD__##e)
#define BFM_BCH_MODE_RSVD_V(v)              BM_BCH_MODE_RSVD
#define BP_BCH_MODE_ERASE_THRESHOLD         0
#define BM_BCH_MODE_ERASE_THRESHOLD         0xff
#define BF_BCH_MODE_ERASE_THRESHOLD(v)      (((v) & 0xff) << 0)
#define BFM_BCH_MODE_ERASE_THRESHOLD(v)     BM_BCH_MODE_ERASE_THRESHOLD
#define BF_BCH_MODE_ERASE_THRESHOLD_V(e)    BF_BCH_MODE_ERASE_THRESHOLD(BV_BCH_MODE_ERASE_THRESHOLD__##e)
#define BFM_BCH_MODE_ERASE_THRESHOLD_V(v)   BM_BCH_MODE_ERASE_THRESHOLD

#define HW_BCH_ENCODEPTR            HW(BCH_ENCODEPTR)
#define HWA_BCH_ENCODEPTR           (0x8000a000 + 0x30)
#define HWT_BCH_ENCODEPTR           HWIO_32_RW
#define HWN_BCH_ENCODEPTR           BCH_ENCODEPTR
#define HWI_BCH_ENCODEPTR           
#define BP_BCH_ENCODEPTR_ADDR       0
#define BM_BCH_ENCODEPTR_ADDR       0xffffffff
#define BF_BCH_ENCODEPTR_ADDR(v)    (((v) & 0xffffffff) << 0)
#define BFM_BCH_ENCODEPTR_ADDR(v)   BM_BCH_ENCODEPTR_ADDR
#define BF_BCH_ENCODEPTR_ADDR_V(e)  BF_BCH_ENCODEPTR_ADDR(BV_BCH_ENCODEPTR_ADDR__##e)
#define BFM_BCH_ENCODEPTR_ADDR_V(v) BM_BCH_ENCODEPTR_ADDR

#define HW_BCH_DATAPTR              HW(BCH_DATAPTR)
#define HWA_BCH_DATAPTR             (0x8000a000 + 0x40)
#define HWT_BCH_DATAPTR             HWIO_32_RW
#define HWN_BCH_DATAPTR             BCH_DATAPTR
#define HWI_BCH_DATAPTR             
#define BP_BCH_DATAPTR_ADDR         0
#define BM_BCH_DATAPTR_ADDR         0xffffffff
#define BF_BCH_DATAPTR_ADDR(v)      (((v) & 0xffffffff) << 0)
#define BFM_BCH_DATAPTR_ADDR(v)     BM_BCH_DATAPTR_ADDR
#define BF_BCH_DATAPTR_ADDR_V(e)    BF_BCH_DATAPTR_ADDR(BV_BCH_DATAPTR_ADDR__##e)
#define BFM_BCH_DATAPTR_ADDR_V(v)   BM_BCH_DATAPTR_ADDR

#define HW_BCH_METAPTR              HW(BCH_METAPTR)
#define HWA_BCH_METAPTR             (0x8000a000 + 0x50)
#define HWT_BCH_METAPTR             HWIO_32_RW
#define HWN_BCH_METAPTR             BCH_METAPTR
#define HWI_BCH_METAPTR             
#define BP_BCH_METAPTR_ADDR         0
#define BM_BCH_METAPTR_ADDR         0xffffffff
#define BF_BCH_METAPTR_ADDR(v)      (((v) & 0xffffffff) << 0)
#define BFM_BCH_METAPTR_ADDR(v)     BM_BCH_METAPTR_ADDR
#define BF_BCH_METAPTR_ADDR_V(e)    BF_BCH_METAPTR_ADDR(BV_BCH_METAPTR_ADDR__##e)
#define BFM_BCH_METAPTR_ADDR_V(v)   BM_BCH_METAPTR_ADDR

#define HW_BCH_LAYOUTSELECT                     HW(BCH_LAYOUTSELECT)
#define HWA_BCH_LAYOUTSELECT                    (0x8000a000 + 0x70)
#define HWT_BCH_LAYOUTSELECT                    HWIO_32_RW
#define HWN_BCH_LAYOUTSELECT                    BCH_LAYOUTSELECT
#define HWI_BCH_LAYOUTSELECT                    
#define BP_BCH_LAYOUTSELECT_CS15_SELECT         30
#define BM_BCH_LAYOUTSELECT_CS15_SELECT         0xc0000000
#define BF_BCH_LAYOUTSELECT_CS15_SELECT(v)      (((v) & 0x3) << 30)
#define BFM_BCH_LAYOUTSELECT_CS15_SELECT(v)     BM_BCH_LAYOUTSELECT_CS15_SELECT
#define BF_BCH_LAYOUTSELECT_CS15_SELECT_V(e)    BF_BCH_LAYOUTSELECT_CS15_SELECT(BV_BCH_LAYOUTSELECT_CS15_SELECT__##e)
#define BFM_BCH_LAYOUTSELECT_CS15_SELECT_V(v)   BM_BCH_LAYOUTSELECT_CS15_SELECT
#define BP_BCH_LAYOUTSELECT_CS14_SELECT         28
#define BM_BCH_LAYOUTSELECT_CS14_SELECT         0x30000000
#define BF_BCH_LAYOUTSELECT_CS14_SELECT(v)      (((v) & 0x3) << 28)
#define BFM_BCH_LAYOUTSELECT_CS14_SELECT(v)     BM_BCH_LAYOUTSELECT_CS14_SELECT
#define BF_BCH_LAYOUTSELECT_CS14_SELECT_V(e)    BF_BCH_LAYOUTSELECT_CS14_SELECT(BV_BCH_LAYOUTSELECT_CS14_SELECT__##e)
#define BFM_BCH_LAYOUTSELECT_CS14_SELECT_V(v)   BM_BCH_LAYOUTSELECT_CS14_SELECT
#define BP_BCH_LAYOUTSELECT_CS13_SELECT         26
#define BM_BCH_LAYOUTSELECT_CS13_SELECT         0xc000000
#define BF_BCH_LAYOUTSELECT_CS13_SELECT(v)      (((v) & 0x3) << 26)
#define BFM_BCH_LAYOUTSELECT_CS13_SELECT(v)     BM_BCH_LAYOUTSELECT_CS13_SELECT
#define BF_BCH_LAYOUTSELECT_CS13_SELECT_V(e)    BF_BCH_LAYOUTSELECT_CS13_SELECT(BV_BCH_LAYOUTSELECT_CS13_SELECT__##e)
#define BFM_BCH_LAYOUTSELECT_CS13_SELECT_V(v)   BM_BCH_LAYOUTSELECT_CS13_SELECT
#define BP_BCH_LAYOUTSELECT_CS12_SELECT         24
#define BM_BCH_LAYOUTSELECT_CS12_SELECT         0x3000000
#define BF_BCH_LAYOUTSELECT_CS12_SELECT(v)      (((v) & 0x3) << 24)
#define BFM_BCH_LAYOUTSELECT_CS12_SELECT(v)     BM_BCH_LAYOUTSELECT_CS12_SELECT
#define BF_BCH_LAYOUTSELECT_CS12_SELECT_V(e)    BF_BCH_LAYOUTSELECT_CS12_SELECT(BV_BCH_LAYOUTSELECT_CS12_SELECT__##e)
#define BFM_BCH_LAYOUTSELECT_CS12_SELECT_V(v)   BM_BCH_LAYOUTSELECT_CS12_SELECT
#define BP_BCH_LAYOUTSELECT_CS11_SELECT         22
#define BM_BCH_LAYOUTSELECT_CS11_SELECT         0xc00000
#define BF_BCH_LAYOUTSELECT_CS11_SELECT(v)      (((v) & 0x3) << 22)
#define BFM_BCH_LAYOUTSELECT_CS11_SELECT(v)     BM_BCH_LAYOUTSELECT_CS11_SELECT
#define BF_BCH_LAYOUTSELECT_CS11_SELECT_V(e)    BF_BCH_LAYOUTSELECT_CS11_SELECT(BV_BCH_LAYOUTSELECT_CS11_SELECT__##e)
#define BFM_BCH_LAYOUTSELECT_CS11_SELECT_V(v)   BM_BCH_LAYOUTSELECT_CS11_SELECT
#define BP_BCH_LAYOUTSELECT_CS10_SELECT         20
#define BM_BCH_LAYOUTSELECT_CS10_SELECT         0x300000
#define BF_BCH_LAYOUTSELECT_CS10_SELECT(v)      (((v) & 0x3) << 20)
#define BFM_BCH_LAYOUTSELECT_CS10_SELECT(v)     BM_BCH_LAYOUTSELECT_CS10_SELECT
#define BF_BCH_LAYOUTSELECT_CS10_SELECT_V(e)    BF_BCH_LAYOUTSELECT_CS10_SELECT(BV_BCH_LAYOUTSELECT_CS10_SELECT__##e)
#define BFM_BCH_LAYOUTSELECT_CS10_SELECT_V(v)   BM_BCH_LAYOUTSELECT_CS10_SELECT
#define BP_BCH_LAYOUTSELECT_CS9_SELECT          18
#define BM_BCH_LAYOUTSELECT_CS9_SELECT          0xc0000
#define BF_BCH_LAYOUTSELECT_CS9_SELECT(v)       (((v) & 0x3) << 18)
#define BFM_BCH_LAYOUTSELECT_CS9_SELECT(v)      BM_BCH_LAYOUTSELECT_CS9_SELECT
#define BF_BCH_LAYOUTSELECT_CS9_SELECT_V(e)     BF_BCH_LAYOUTSELECT_CS9_SELECT(BV_BCH_LAYOUTSELECT_CS9_SELECT__##e)
#define BFM_BCH_LAYOUTSELECT_CS9_SELECT_V(v)    BM_BCH_LAYOUTSELECT_CS9_SELECT
#define BP_BCH_LAYOUTSELECT_CS8_SELECT          16
#define BM_BCH_LAYOUTSELECT_CS8_SELECT          0x30000
#define BF_BCH_LAYOUTSELECT_CS8_SELECT(v)       (((v) & 0x3) << 16)
#define BFM_BCH_LAYOUTSELECT_CS8_SELECT(v)      BM_BCH_LAYOUTSELECT_CS8_SELECT
#define BF_BCH_LAYOUTSELECT_CS8_SELECT_V(e)     BF_BCH_LAYOUTSELECT_CS8_SELECT(BV_BCH_LAYOUTSELECT_CS8_SELECT__##e)
#define BFM_BCH_LAYOUTSELECT_CS8_SELECT_V(v)    BM_BCH_LAYOUTSELECT_CS8_SELECT
#define BP_BCH_LAYOUTSELECT_CS7_SELECT          14
#define BM_BCH_LAYOUTSELECT_CS7_SELECT          0xc000
#define BF_BCH_LAYOUTSELECT_CS7_SELECT(v)       (((v) & 0x3) << 14)
#define BFM_BCH_LAYOUTSELECT_CS7_SELECT(v)      BM_BCH_LAYOUTSELECT_CS7_SELECT
#define BF_BCH_LAYOUTSELECT_CS7_SELECT_V(e)     BF_BCH_LAYOUTSELECT_CS7_SELECT(BV_BCH_LAYOUTSELECT_CS7_SELECT__##e)
#define BFM_BCH_LAYOUTSELECT_CS7_SELECT_V(v)    BM_BCH_LAYOUTSELECT_CS7_SELECT
#define BP_BCH_LAYOUTSELECT_CS6_SELECT          12
#define BM_BCH_LAYOUTSELECT_CS6_SELECT          0x3000
#define BF_BCH_LAYOUTSELECT_CS6_SELECT(v)       (((v) & 0x3) << 12)
#define BFM_BCH_LAYOUTSELECT_CS6_SELECT(v)      BM_BCH_LAYOUTSELECT_CS6_SELECT
#define BF_BCH_LAYOUTSELECT_CS6_SELECT_V(e)     BF_BCH_LAYOUTSELECT_CS6_SELECT(BV_BCH_LAYOUTSELECT_CS6_SELECT__##e)
#define BFM_BCH_LAYOUTSELECT_CS6_SELECT_V(v)    BM_BCH_LAYOUTSELECT_CS6_SELECT
#define BP_BCH_LAYOUTSELECT_CS5_SELECT          10
#define BM_BCH_LAYOUTSELECT_CS5_SELECT          0xc00
#define BF_BCH_LAYOUTSELECT_CS5_SELECT(v)       (((v) & 0x3) << 10)
#define BFM_BCH_LAYOUTSELECT_CS5_SELECT(v)      BM_BCH_LAYOUTSELECT_CS5_SELECT
#define BF_BCH_LAYOUTSELECT_CS5_SELECT_V(e)     BF_BCH_LAYOUTSELECT_CS5_SELECT(BV_BCH_LAYOUTSELECT_CS5_SELECT__##e)
#define BFM_BCH_LAYOUTSELECT_CS5_SELECT_V(v)    BM_BCH_LAYOUTSELECT_CS5_SELECT
#define BP_BCH_LAYOUTSELECT_CS4_SELECT          8
#define BM_BCH_LAYOUTSELECT_CS4_SELECT          0x300
#define BF_BCH_LAYOUTSELECT_CS4_SELECT(v)       (((v) & 0x3) << 8)
#define BFM_BCH_LAYOUTSELECT_CS4_SELECT(v)      BM_BCH_LAYOUTSELECT_CS4_SELECT
#define BF_BCH_LAYOUTSELECT_CS4_SELECT_V(e)     BF_BCH_LAYOUTSELECT_CS4_SELECT(BV_BCH_LAYOUTSELECT_CS4_SELECT__##e)
#define BFM_BCH_LAYOUTSELECT_CS4_SELECT_V(v)    BM_BCH_LAYOUTSELECT_CS4_SELECT
#define BP_BCH_LAYOUTSELECT_CS3_SELECT          6
#define BM_BCH_LAYOUTSELECT_CS3_SELECT          0xc0
#define BF_BCH_LAYOUTSELECT_CS3_SELECT(v)       (((v) & 0x3) << 6)
#define BFM_BCH_LAYOUTSELECT_CS3_SELECT(v)      BM_BCH_LAYOUTSELECT_CS3_SELECT
#define BF_BCH_LAYOUTSELECT_CS3_SELECT_V(e)     BF_BCH_LAYOUTSELECT_CS3_SELECT(BV_BCH_LAYOUTSELECT_CS3_SELECT__##e)
#define BFM_BCH_LAYOUTSELECT_CS3_SELECT_V(v)    BM_BCH_LAYOUTSELECT_CS3_SELECT
#define BP_BCH_LAYOUTSELECT_CS2_SELECT          4
#define BM_BCH_LAYOUTSELECT_CS2_SELECT          0x30
#define BF_BCH_LAYOUTSELECT_CS2_SELECT(v)       (((v) & 0x3) << 4)
#define BFM_BCH_LAYOUTSELECT_CS2_SELECT(v)      BM_BCH_LAYOUTSELECT_CS2_SELECT
#define BF_BCH_LAYOUTSELECT_CS2_SELECT_V(e)     BF_BCH_LAYOUTSELECT_CS2_SELECT(BV_BCH_LAYOUTSELECT_CS2_SELECT__##e)
#define BFM_BCH_LAYOUTSELECT_CS2_SELECT_V(v)    BM_BCH_LAYOUTSELECT_CS2_SELECT
#define BP_BCH_LAYOUTSELECT_CS1_SELECT          2
#define BM_BCH_LAYOUTSELECT_CS1_SELECT          0xc
#define BF_BCH_LAYOUTSELECT_CS1_SELECT(v)       (((v) & 0x3) << 2)
#define BFM_BCH_LAYOUTSELECT_CS1_SELECT(v)      BM_BCH_LAYOUTSELECT_CS1_SELECT
#define BF_BCH_LAYOUTSELECT_CS1_SELECT_V(e)     BF_BCH_LAYOUTSELECT_CS1_SELECT(BV_BCH_LAYOUTSELECT_CS1_SELECT__##e)
#define BFM_BCH_LAYOUTSELECT_CS1_SELECT_V(v)    BM_BCH_LAYOUTSELECT_CS1_SELECT
#define BP_BCH_LAYOUTSELECT_CS0_SELECT          0
#define BM_BCH_LAYOUTSELECT_CS0_SELECT          0x3
#define BF_BCH_LAYOUTSELECT_CS0_SELECT(v)       (((v) & 0x3) << 0)
#define BFM_BCH_LAYOUTSELECT_CS0_SELECT(v)      BM_BCH_LAYOUTSELECT_CS0_SELECT
#define BF_BCH_LAYOUTSELECT_CS0_SELECT_V(e)     BF_BCH_LAYOUTSELECT_CS0_SELECT(BV_BCH_LAYOUTSELECT_CS0_SELECT__##e)
#define BFM_BCH_LAYOUTSELECT_CS0_SELECT_V(v)    BM_BCH_LAYOUTSELECT_CS0_SELECT

#define HW_BCH_FLASH0LAYOUT0                    HW(BCH_FLASH0LAYOUT0)
#define HWA_BCH_FLASH0LAYOUT0                   (0x8000a000 + 0x80)
#define HWT_BCH_FLASH0LAYOUT0                   HWIO_32_RW
#define HWN_BCH_FLASH0LAYOUT0                   BCH_FLASH0LAYOUT0
#define HWI_BCH_FLASH0LAYOUT0                   
#define BP_BCH_FLASH0LAYOUT0_NBLOCKS            24
#define BM_BCH_FLASH0LAYOUT0_NBLOCKS            0xff000000
#define BF_BCH_FLASH0LAYOUT0_NBLOCKS(v)         (((v) & 0xff) << 24)
#define BFM_BCH_FLASH0LAYOUT0_NBLOCKS(v)        BM_BCH_FLASH0LAYOUT0_NBLOCKS
#define BF_BCH_FLASH0LAYOUT0_NBLOCKS_V(e)       BF_BCH_FLASH0LAYOUT0_NBLOCKS(BV_BCH_FLASH0LAYOUT0_NBLOCKS__##e)
#define BFM_BCH_FLASH0LAYOUT0_NBLOCKS_V(v)      BM_BCH_FLASH0LAYOUT0_NBLOCKS
#define BP_BCH_FLASH0LAYOUT0_META_SIZE          16
#define BM_BCH_FLASH0LAYOUT0_META_SIZE          0xff0000
#define BF_BCH_FLASH0LAYOUT0_META_SIZE(v)       (((v) & 0xff) << 16)
#define BFM_BCH_FLASH0LAYOUT0_META_SIZE(v)      BM_BCH_FLASH0LAYOUT0_META_SIZE
#define BF_BCH_FLASH0LAYOUT0_META_SIZE_V(e)     BF_BCH_FLASH0LAYOUT0_META_SIZE(BV_BCH_FLASH0LAYOUT0_META_SIZE__##e)
#define BFM_BCH_FLASH0LAYOUT0_META_SIZE_V(v)    BM_BCH_FLASH0LAYOUT0_META_SIZE
#define BP_BCH_FLASH0LAYOUT0_ECC0               12
#define BM_BCH_FLASH0LAYOUT0_ECC0               0xf000
#define BV_BCH_FLASH0LAYOUT0_ECC0__NONE         0x0
#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC2         0x1
#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC4         0x2
#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC6         0x3
#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC8         0x4
#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC10        0x5
#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC12        0x6
#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC14        0x7
#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC16        0x8
#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC18        0x9
#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC20        0xa
#define BF_BCH_FLASH0LAYOUT0_ECC0(v)            (((v) & 0xf) << 12)
#define BFM_BCH_FLASH0LAYOUT0_ECC0(v)           BM_BCH_FLASH0LAYOUT0_ECC0
#define BF_BCH_FLASH0LAYOUT0_ECC0_V(e)          BF_BCH_FLASH0LAYOUT0_ECC0(BV_BCH_FLASH0LAYOUT0_ECC0__##e)
#define BFM_BCH_FLASH0LAYOUT0_ECC0_V(v)         BM_BCH_FLASH0LAYOUT0_ECC0
#define BP_BCH_FLASH0LAYOUT0_DATA0_SIZE         0
#define BM_BCH_FLASH0LAYOUT0_DATA0_SIZE         0xfff
#define BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(v)      (((v) & 0xfff) << 0)
#define BFM_BCH_FLASH0LAYOUT0_DATA0_SIZE(v)     BM_BCH_FLASH0LAYOUT0_DATA0_SIZE
#define BF_BCH_FLASH0LAYOUT0_DATA0_SIZE_V(e)    BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(BV_BCH_FLASH0LAYOUT0_DATA0_SIZE__##e)
#define BFM_BCH_FLASH0LAYOUT0_DATA0_SIZE_V(v)   BM_BCH_FLASH0LAYOUT0_DATA0_SIZE

#define HW_BCH_FLASH0LAYOUT1                    HW(BCH_FLASH0LAYOUT1)
#define HWA_BCH_FLASH0LAYOUT1                   (0x8000a000 + 0x90)
#define HWT_BCH_FLASH0LAYOUT1                   HWIO_32_RW
#define HWN_BCH_FLASH0LAYOUT1                   BCH_FLASH0LAYOUT1
#define HWI_BCH_FLASH0LAYOUT1                   
#define BP_BCH_FLASH0LAYOUT1_PAGE_SIZE          16
#define BM_BCH_FLASH0LAYOUT1_PAGE_SIZE          0xffff0000
#define BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(v)       (((v) & 0xffff) << 16)
#define BFM_BCH_FLASH0LAYOUT1_PAGE_SIZE(v)      BM_BCH_FLASH0LAYOUT1_PAGE_SIZE
#define BF_BCH_FLASH0LAYOUT1_PAGE_SIZE_V(e)     BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(BV_BCH_FLASH0LAYOUT1_PAGE_SIZE__##e)
#define BFM_BCH_FLASH0LAYOUT1_PAGE_SIZE_V(v)    BM_BCH_FLASH0LAYOUT1_PAGE_SIZE
#define BP_BCH_FLASH0LAYOUT1_ECCN               12
#define BM_BCH_FLASH0LAYOUT1_ECCN               0xf000
#define BV_BCH_FLASH0LAYOUT1_ECCN__NONE         0x0
#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC2         0x1
#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC4         0x2
#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC6         0x3
#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC8         0x4
#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC10        0x5
#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC12        0x6
#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC14        0x7
#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC16        0x8
#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC18        0x9
#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC20        0xa
#define BF_BCH_FLASH0LAYOUT1_ECCN(v)            (((v) & 0xf) << 12)
#define BFM_BCH_FLASH0LAYOUT1_ECCN(v)           BM_BCH_FLASH0LAYOUT1_ECCN
#define BF_BCH_FLASH0LAYOUT1_ECCN_V(e)          BF_BCH_FLASH0LAYOUT1_ECCN(BV_BCH_FLASH0LAYOUT1_ECCN__##e)
#define BFM_BCH_FLASH0LAYOUT1_ECCN_V(v)         BM_BCH_FLASH0LAYOUT1_ECCN
#define BP_BCH_FLASH0LAYOUT1_DATAN_SIZE         0
#define BM_BCH_FLASH0LAYOUT1_DATAN_SIZE         0xfff
#define BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(v)      (((v) & 0xfff) << 0)
#define BFM_BCH_FLASH0LAYOUT1_DATAN_SIZE(v)     BM_BCH_FLASH0LAYOUT1_DATAN_SIZE
#define BF_BCH_FLASH0LAYOUT1_DATAN_SIZE_V(e)    BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(BV_BCH_FLASH0LAYOUT1_DATAN_SIZE__##e)
#define BFM_BCH_FLASH0LAYOUT1_DATAN_SIZE_V(v)   BM_BCH_FLASH0LAYOUT1_DATAN_SIZE

#define HW_BCH_FLASH1LAYOUT0                    HW(BCH_FLASH1LAYOUT0)
#define HWA_BCH_FLASH1LAYOUT0                   (0x8000a000 + 0xa0)
#define HWT_BCH_FLASH1LAYOUT0                   HWIO_32_RW
#define HWN_BCH_FLASH1LAYOUT0                   BCH_FLASH1LAYOUT0
#define HWI_BCH_FLASH1LAYOUT0                   
#define BP_BCH_FLASH1LAYOUT0_NBLOCKS            24
#define BM_BCH_FLASH1LAYOUT0_NBLOCKS            0xff000000
#define BF_BCH_FLASH1LAYOUT0_NBLOCKS(v)         (((v) & 0xff) << 24)
#define BFM_BCH_FLASH1LAYOUT0_NBLOCKS(v)        BM_BCH_FLASH1LAYOUT0_NBLOCKS
#define BF_BCH_FLASH1LAYOUT0_NBLOCKS_V(e)       BF_BCH_FLASH1LAYOUT0_NBLOCKS(BV_BCH_FLASH1LAYOUT0_NBLOCKS__##e)
#define BFM_BCH_FLASH1LAYOUT0_NBLOCKS_V(v)      BM_BCH_FLASH1LAYOUT0_NBLOCKS
#define BP_BCH_FLASH1LAYOUT0_META_SIZE          16
#define BM_BCH_FLASH1LAYOUT0_META_SIZE          0xff0000
#define BF_BCH_FLASH1LAYOUT0_META_SIZE(v)       (((v) & 0xff) << 16)
#define BFM_BCH_FLASH1LAYOUT0_META_SIZE(v)      BM_BCH_FLASH1LAYOUT0_META_SIZE
#define BF_BCH_FLASH1LAYOUT0_META_SIZE_V(e)     BF_BCH_FLASH1LAYOUT0_META_SIZE(BV_BCH_FLASH1LAYOUT0_META_SIZE__##e)
#define BFM_BCH_FLASH1LAYOUT0_META_SIZE_V(v)    BM_BCH_FLASH1LAYOUT0_META_SIZE
#define BP_BCH_FLASH1LAYOUT0_ECC0               12
#define BM_BCH_FLASH1LAYOUT0_ECC0               0xf000
#define BV_BCH_FLASH1LAYOUT0_ECC0__NONE         0x0
#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC2         0x1
#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC4         0x2
#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC6         0x3
#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC8         0x4
#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC10        0x5
#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC12        0x6
#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC14        0x7
#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC16        0x8
#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC18        0x9
#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC20        0xa
#define BF_BCH_FLASH1LAYOUT0_ECC0(v)            (((v) & 0xf) << 12)
#define BFM_BCH_FLASH1LAYOUT0_ECC0(v)           BM_BCH_FLASH1LAYOUT0_ECC0
#define BF_BCH_FLASH1LAYOUT0_ECC0_V(e)          BF_BCH_FLASH1LAYOUT0_ECC0(BV_BCH_FLASH1LAYOUT0_ECC0__##e)
#define BFM_BCH_FLASH1LAYOUT0_ECC0_V(v)         BM_BCH_FLASH1LAYOUT0_ECC0
#define BP_BCH_FLASH1LAYOUT0_DATA0_SIZE         0
#define BM_BCH_FLASH1LAYOUT0_DATA0_SIZE         0xfff
#define BF_BCH_FLASH1LAYOUT0_DATA0_SIZE(v)      (((v) & 0xfff) << 0)
#define BFM_BCH_FLASH1LAYOUT0_DATA0_SIZE(v)     BM_BCH_FLASH1LAYOUT0_DATA0_SIZE
#define BF_BCH_FLASH1LAYOUT0_DATA0_SIZE_V(e)    BF_BCH_FLASH1LAYOUT0_DATA0_SIZE(BV_BCH_FLASH1LAYOUT0_DATA0_SIZE__##e)
#define BFM_BCH_FLASH1LAYOUT0_DATA0_SIZE_V(v)   BM_BCH_FLASH1LAYOUT0_DATA0_SIZE

#define HW_BCH_FLASH1LAYOUT1                    HW(BCH_FLASH1LAYOUT1)
#define HWA_BCH_FLASH1LAYOUT1                   (0x8000a000 + 0xb0)
#define HWT_BCH_FLASH1LAYOUT1                   HWIO_32_RW
#define HWN_BCH_FLASH1LAYOUT1                   BCH_FLASH1LAYOUT1
#define HWI_BCH_FLASH1LAYOUT1                   
#define BP_BCH_FLASH1LAYOUT1_PAGE_SIZE          16
#define BM_BCH_FLASH1LAYOUT1_PAGE_SIZE          0xffff0000
#define BF_BCH_FLASH1LAYOUT1_PAGE_SIZE(v)       (((v) & 0xffff) << 16)
#define BFM_BCH_FLASH1LAYOUT1_PAGE_SIZE(v)      BM_BCH_FLASH1LAYOUT1_PAGE_SIZE
#define BF_BCH_FLASH1LAYOUT1_PAGE_SIZE_V(e)     BF_BCH_FLASH1LAYOUT1_PAGE_SIZE(BV_BCH_FLASH1LAYOUT1_PAGE_SIZE__##e)
#define BFM_BCH_FLASH1LAYOUT1_PAGE_SIZE_V(v)    BM_BCH_FLASH1LAYOUT1_PAGE_SIZE
#define BP_BCH_FLASH1LAYOUT1_ECCN               12
#define BM_BCH_FLASH1LAYOUT1_ECCN               0xf000
#define BV_BCH_FLASH1LAYOUT1_ECCN__NONE         0x0
#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC2         0x1
#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC4         0x2
#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC6         0x3
#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC8         0x4
#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC10        0x5
#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC12        0x6
#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC14        0x7
#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC16        0x8
#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC18        0x9
#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC20        0xa
#define BF_BCH_FLASH1LAYOUT1_ECCN(v)            (((v) & 0xf) << 12)
#define BFM_BCH_FLASH1LAYOUT1_ECCN(v)           BM_BCH_FLASH1LAYOUT1_ECCN
#define BF_BCH_FLASH1LAYOUT1_ECCN_V(e)          BF_BCH_FLASH1LAYOUT1_ECCN(BV_BCH_FLASH1LAYOUT1_ECCN__##e)
#define BFM_BCH_FLASH1LAYOUT1_ECCN_V(v)         BM_BCH_FLASH1LAYOUT1_ECCN
#define BP_BCH_FLASH1LAYOUT1_DATAN_SIZE         0
#define BM_BCH_FLASH1LAYOUT1_DATAN_SIZE         0xfff
#define BF_BCH_FLASH1LAYOUT1_DATAN_SIZE(v)      (((v) & 0xfff) << 0)
#define BFM_BCH_FLASH1LAYOUT1_DATAN_SIZE(v)     BM_BCH_FLASH1LAYOUT1_DATAN_SIZE
#define BF_BCH_FLASH1LAYOUT1_DATAN_SIZE_V(e)    BF_BCH_FLASH1LAYOUT1_DATAN_SIZE(BV_BCH_FLASH1LAYOUT1_DATAN_SIZE__##e)
#define BFM_BCH_FLASH1LAYOUT1_DATAN_SIZE_V(v)   BM_BCH_FLASH1LAYOUT1_DATAN_SIZE

#define HW_BCH_FLASH2LAYOUT0                    HW(BCH_FLASH2LAYOUT0)
#define HWA_BCH_FLASH2LAYOUT0                   (0x8000a000 + 0xc0)
#define HWT_BCH_FLASH2LAYOUT0                   HWIO_32_RW
#define HWN_BCH_FLASH2LAYOUT0                   BCH_FLASH2LAYOUT0
#define HWI_BCH_FLASH2LAYOUT0                   
#define BP_BCH_FLASH2LAYOUT0_NBLOCKS            24
#define BM_BCH_FLASH2LAYOUT0_NBLOCKS            0xff000000
#define BF_BCH_FLASH2LAYOUT0_NBLOCKS(v)         (((v) & 0xff) << 24)
#define BFM_BCH_FLASH2LAYOUT0_NBLOCKS(v)        BM_BCH_FLASH2LAYOUT0_NBLOCKS
#define BF_BCH_FLASH2LAYOUT0_NBLOCKS_V(e)       BF_BCH_FLASH2LAYOUT0_NBLOCKS(BV_BCH_FLASH2LAYOUT0_NBLOCKS__##e)
#define BFM_BCH_FLASH2LAYOUT0_NBLOCKS_V(v)      BM_BCH_FLASH2LAYOUT0_NBLOCKS
#define BP_BCH_FLASH2LAYOUT0_META_SIZE          16
#define BM_BCH_FLASH2LAYOUT0_META_SIZE          0xff0000
#define BF_BCH_FLASH2LAYOUT0_META_SIZE(v)       (((v) & 0xff) << 16)
#define BFM_BCH_FLASH2LAYOUT0_META_SIZE(v)      BM_BCH_FLASH2LAYOUT0_META_SIZE
#define BF_BCH_FLASH2LAYOUT0_META_SIZE_V(e)     BF_BCH_FLASH2LAYOUT0_META_SIZE(BV_BCH_FLASH2LAYOUT0_META_SIZE__##e)
#define BFM_BCH_FLASH2LAYOUT0_META_SIZE_V(v)    BM_BCH_FLASH2LAYOUT0_META_SIZE
#define BP_BCH_FLASH2LAYOUT0_ECC0               12
#define BM_BCH_FLASH2LAYOUT0_ECC0               0xf000
#define BV_BCH_FLASH2LAYOUT0_ECC0__NONE         0x0
#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC2         0x1
#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC4         0x2
#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC6         0x3
#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC8         0x4
#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC10        0x5
#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC12        0x6
#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC14        0x7
#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC16        0x8
#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC18        0x9
#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC20        0xa
#define BF_BCH_FLASH2LAYOUT0_ECC0(v)            (((v) & 0xf) << 12)
#define BFM_BCH_FLASH2LAYOUT0_ECC0(v)           BM_BCH_FLASH2LAYOUT0_ECC0
#define BF_BCH_FLASH2LAYOUT0_ECC0_V(e)          BF_BCH_FLASH2LAYOUT0_ECC0(BV_BCH_FLASH2LAYOUT0_ECC0__##e)
#define BFM_BCH_FLASH2LAYOUT0_ECC0_V(v)         BM_BCH_FLASH2LAYOUT0_ECC0
#define BP_BCH_FLASH2LAYOUT0_DATA0_SIZE         0
#define BM_BCH_FLASH2LAYOUT0_DATA0_SIZE         0xfff
#define BF_BCH_FLASH2LAYOUT0_DATA0_SIZE(v)      (((v) & 0xfff) << 0)
#define BFM_BCH_FLASH2LAYOUT0_DATA0_SIZE(v)     BM_BCH_FLASH2LAYOUT0_DATA0_SIZE
#define BF_BCH_FLASH2LAYOUT0_DATA0_SIZE_V(e)    BF_BCH_FLASH2LAYOUT0_DATA0_SIZE(BV_BCH_FLASH2LAYOUT0_DATA0_SIZE__##e)
#define BFM_BCH_FLASH2LAYOUT0_DATA0_SIZE_V(v)   BM_BCH_FLASH2LAYOUT0_DATA0_SIZE

#define HW_BCH_FLASH2LAYOUT1                    HW(BCH_FLASH2LAYOUT1)
#define HWA_BCH_FLASH2LAYOUT1                   (0x8000a000 + 0xd0)
#define HWT_BCH_FLASH2LAYOUT1                   HWIO_32_RW
#define HWN_BCH_FLASH2LAYOUT1                   BCH_FLASH2LAYOUT1
#define HWI_BCH_FLASH2LAYOUT1                   
#define BP_BCH_FLASH2LAYOUT1_PAGE_SIZE          16
#define BM_BCH_FLASH2LAYOUT1_PAGE_SIZE          0xffff0000
#define BF_BCH_FLASH2LAYOUT1_PAGE_SIZE(v)       (((v) & 0xffff) << 16)
#define BFM_BCH_FLASH2LAYOUT1_PAGE_SIZE(v)      BM_BCH_FLASH2LAYOUT1_PAGE_SIZE
#define BF_BCH_FLASH2LAYOUT1_PAGE_SIZE_V(e)     BF_BCH_FLASH2LAYOUT1_PAGE_SIZE(BV_BCH_FLASH2LAYOUT1_PAGE_SIZE__##e)
#define BFM_BCH_FLASH2LAYOUT1_PAGE_SIZE_V(v)    BM_BCH_FLASH2LAYOUT1_PAGE_SIZE
#define BP_BCH_FLASH2LAYOUT1_ECCN               12
#define BM_BCH_FLASH2LAYOUT1_ECCN               0xf000
#define BV_BCH_FLASH2LAYOUT1_ECCN__NONE         0x0
#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC2         0x1
#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC4         0x2
#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC6         0x3
#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC8         0x4
#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC10        0x5
#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC12        0x6
#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC14        0x7
#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC16        0x8
#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC18        0x9
#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC20        0xa
#define BF_BCH_FLASH2LAYOUT1_ECCN(v)            (((v) & 0xf) << 12)
#define BFM_BCH_FLASH2LAYOUT1_ECCN(v)           BM_BCH_FLASH2LAYOUT1_ECCN
#define BF_BCH_FLASH2LAYOUT1_ECCN_V(e)          BF_BCH_FLASH2LAYOUT1_ECCN(BV_BCH_FLASH2LAYOUT1_ECCN__##e)
#define BFM_BCH_FLASH2LAYOUT1_ECCN_V(v)         BM_BCH_FLASH2LAYOUT1_ECCN
#define BP_BCH_FLASH2LAYOUT1_DATAN_SIZE         0
#define BM_BCH_FLASH2LAYOUT1_DATAN_SIZE         0xfff
#define BF_BCH_FLASH2LAYOUT1_DATAN_SIZE(v)      (((v) & 0xfff) << 0)
#define BFM_BCH_FLASH2LAYOUT1_DATAN_SIZE(v)     BM_BCH_FLASH2LAYOUT1_DATAN_SIZE
#define BF_BCH_FLASH2LAYOUT1_DATAN_SIZE_V(e)    BF_BCH_FLASH2LAYOUT1_DATAN_SIZE(BV_BCH_FLASH2LAYOUT1_DATAN_SIZE__##e)
#define BFM_BCH_FLASH2LAYOUT1_DATAN_SIZE_V(v)   BM_BCH_FLASH2LAYOUT1_DATAN_SIZE

#define HW_BCH_FLASH3LAYOUT0                    HW(BCH_FLASH3LAYOUT0)
#define HWA_BCH_FLASH3LAYOUT0                   (0x8000a000 + 0xe0)
#define HWT_BCH_FLASH3LAYOUT0                   HWIO_32_RW
#define HWN_BCH_FLASH3LAYOUT0                   BCH_FLASH3LAYOUT0
#define HWI_BCH_FLASH3LAYOUT0                   
#define BP_BCH_FLASH3LAYOUT0_NBLOCKS            24
#define BM_BCH_FLASH3LAYOUT0_NBLOCKS            0xff000000
#define BF_BCH_FLASH3LAYOUT0_NBLOCKS(v)         (((v) & 0xff) << 24)
#define BFM_BCH_FLASH3LAYOUT0_NBLOCKS(v)        BM_BCH_FLASH3LAYOUT0_NBLOCKS
#define BF_BCH_FLASH3LAYOUT0_NBLOCKS_V(e)       BF_BCH_FLASH3LAYOUT0_NBLOCKS(BV_BCH_FLASH3LAYOUT0_NBLOCKS__##e)
#define BFM_BCH_FLASH3LAYOUT0_NBLOCKS_V(v)      BM_BCH_FLASH3LAYOUT0_NBLOCKS
#define BP_BCH_FLASH3LAYOUT0_META_SIZE          16
#define BM_BCH_FLASH3LAYOUT0_META_SIZE          0xff0000
#define BF_BCH_FLASH3LAYOUT0_META_SIZE(v)       (((v) & 0xff) << 16)
#define BFM_BCH_FLASH3LAYOUT0_META_SIZE(v)      BM_BCH_FLASH3LAYOUT0_META_SIZE
#define BF_BCH_FLASH3LAYOUT0_META_SIZE_V(e)     BF_BCH_FLASH3LAYOUT0_META_SIZE(BV_BCH_FLASH3LAYOUT0_META_SIZE__##e)
#define BFM_BCH_FLASH3LAYOUT0_META_SIZE_V(v)    BM_BCH_FLASH3LAYOUT0_META_SIZE
#define BP_BCH_FLASH3LAYOUT0_ECC0               12
#define BM_BCH_FLASH3LAYOUT0_ECC0               0xf000
#define BV_BCH_FLASH3LAYOUT0_ECC0__NONE         0x0
#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC2         0x1
#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC4         0x2
#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC6         0x3
#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC8         0x4
#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC10        0x5
#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC12        0x6
#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC14        0x7
#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC16        0x8
#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC18        0x9
#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC20        0xa
#define BF_BCH_FLASH3LAYOUT0_ECC0(v)            (((v) & 0xf) << 12)
#define BFM_BCH_FLASH3LAYOUT0_ECC0(v)           BM_BCH_FLASH3LAYOUT0_ECC0
#define BF_BCH_FLASH3LAYOUT0_ECC0_V(e)          BF_BCH_FLASH3LAYOUT0_ECC0(BV_BCH_FLASH3LAYOUT0_ECC0__##e)
#define BFM_BCH_FLASH3LAYOUT0_ECC0_V(v)         BM_BCH_FLASH3LAYOUT0_ECC0
#define BP_BCH_FLASH3LAYOUT0_DATA0_SIZE         0
#define BM_BCH_FLASH3LAYOUT0_DATA0_SIZE         0xfff
#define BF_BCH_FLASH3LAYOUT0_DATA0_SIZE(v)      (((v) & 0xfff) << 0)
#define BFM_BCH_FLASH3LAYOUT0_DATA0_SIZE(v)     BM_BCH_FLASH3LAYOUT0_DATA0_SIZE
#define BF_BCH_FLASH3LAYOUT0_DATA0_SIZE_V(e)    BF_BCH_FLASH3LAYOUT0_DATA0_SIZE(BV_BCH_FLASH3LAYOUT0_DATA0_SIZE__##e)
#define BFM_BCH_FLASH3LAYOUT0_DATA0_SIZE_V(v)   BM_BCH_FLASH3LAYOUT0_DATA0_SIZE

#define HW_BCH_FLASH3LAYOUT1                    HW(BCH_FLASH3LAYOUT1)
#define HWA_BCH_FLASH3LAYOUT1                   (0x8000a000 + 0xf0)
#define HWT_BCH_FLASH3LAYOUT1                   HWIO_32_RW
#define HWN_BCH_FLASH3LAYOUT1                   BCH_FLASH3LAYOUT1
#define HWI_BCH_FLASH3LAYOUT1                   
#define BP_BCH_FLASH3LAYOUT1_PAGE_SIZE          16
#define BM_BCH_FLASH3LAYOUT1_PAGE_SIZE          0xffff0000
#define BF_BCH_FLASH3LAYOUT1_PAGE_SIZE(v)       (((v) & 0xffff) << 16)
#define BFM_BCH_FLASH3LAYOUT1_PAGE_SIZE(v)      BM_BCH_FLASH3LAYOUT1_PAGE_SIZE
#define BF_BCH_FLASH3LAYOUT1_PAGE_SIZE_V(e)     BF_BCH_FLASH3LAYOUT1_PAGE_SIZE(BV_BCH_FLASH3LAYOUT1_PAGE_SIZE__##e)
#define BFM_BCH_FLASH3LAYOUT1_PAGE_SIZE_V(v)    BM_BCH_FLASH3LAYOUT1_PAGE_SIZE
#define BP_BCH_FLASH3LAYOUT1_ECCN               12
#define BM_BCH_FLASH3LAYOUT1_ECCN               0xf000
#define BV_BCH_FLASH3LAYOUT1_ECCN__NONE         0x0
#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC2         0x1
#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC4         0x2
#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC6         0x3
#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC8         0x4
#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC10        0x5
#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC12        0x6
#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC14        0x7
#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC16        0x8
#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC18        0x9
#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC20        0xa
#define BF_BCH_FLASH3LAYOUT1_ECCN(v)            (((v) & 0xf) << 12)
#define BFM_BCH_FLASH3LAYOUT1_ECCN(v)           BM_BCH_FLASH3LAYOUT1_ECCN
#define BF_BCH_FLASH3LAYOUT1_ECCN_V(e)          BF_BCH_FLASH3LAYOUT1_ECCN(BV_BCH_FLASH3LAYOUT1_ECCN__##e)
#define BFM_BCH_FLASH3LAYOUT1_ECCN_V(v)         BM_BCH_FLASH3LAYOUT1_ECCN
#define BP_BCH_FLASH3LAYOUT1_DATAN_SIZE         0
#define BM_BCH_FLASH3LAYOUT1_DATAN_SIZE         0xfff
#define BF_BCH_FLASH3LAYOUT1_DATAN_SIZE(v)      (((v) & 0xfff) << 0)
#define BFM_BCH_FLASH3LAYOUT1_DATAN_SIZE(v)     BM_BCH_FLASH3LAYOUT1_DATAN_SIZE
#define BF_BCH_FLASH3LAYOUT1_DATAN_SIZE_V(e)    BF_BCH_FLASH3LAYOUT1_DATAN_SIZE(BV_BCH_FLASH3LAYOUT1_DATAN_SIZE__##e)
#define BFM_BCH_FLASH3LAYOUT1_DATAN_SIZE_V(v)   BM_BCH_FLASH3LAYOUT1_DATAN_SIZE

#define HW_BCH_DEBUG0                                       HW(BCH_DEBUG0)
#define HWA_BCH_DEBUG0                                      (0x8000a000 + 0x100)
#define HWT_BCH_DEBUG0                                      HWIO_32_RW
#define HWN_BCH_DEBUG0                                      BCH_DEBUG0
#define HWI_BCH_DEBUG0                                      
#define HW_BCH_DEBUG0_SET                                   HW(BCH_DEBUG0_SET)
#define HWA_BCH_DEBUG0_SET                                  (HWA_BCH_DEBUG0 + 0x4)
#define HWT_BCH_DEBUG0_SET                                  HWIO_32_WO
#define HWN_BCH_DEBUG0_SET                                  BCH_DEBUG0
#define HWI_BCH_DEBUG0_SET                                  
#define HW_BCH_DEBUG0_CLR                                   HW(BCH_DEBUG0_CLR)
#define HWA_BCH_DEBUG0_CLR                                  (HWA_BCH_DEBUG0 + 0x8)
#define HWT_BCH_DEBUG0_CLR                                  HWIO_32_WO
#define HWN_BCH_DEBUG0_CLR                                  BCH_DEBUG0
#define HWI_BCH_DEBUG0_CLR                                  
#define HW_BCH_DEBUG0_TOG                                   HW(BCH_DEBUG0_TOG)
#define HWA_BCH_DEBUG0_TOG                                  (HWA_BCH_DEBUG0 + 0xc)
#define HWT_BCH_DEBUG0_TOG                                  HWIO_32_WO
#define HWN_BCH_DEBUG0_TOG                                  BCH_DEBUG0
#define HWI_BCH_DEBUG0_TOG                                  
#define BP_BCH_DEBUG0_RSVD1                                 27
#define BM_BCH_DEBUG0_RSVD1                                 0xf8000000
#define BF_BCH_DEBUG0_RSVD1(v)                              (((v) & 0x1f) << 27)
#define BFM_BCH_DEBUG0_RSVD1(v)                             BM_BCH_DEBUG0_RSVD1
#define BF_BCH_DEBUG0_RSVD1_V(e)                            BF_BCH_DEBUG0_RSVD1(BV_BCH_DEBUG0_RSVD1__##e)
#define BFM_BCH_DEBUG0_RSVD1_V(v)                           BM_BCH_DEBUG0_RSVD1
#define BP_BCH_DEBUG0_ROM_BIST_ENABLE                       26
#define BM_BCH_DEBUG0_ROM_BIST_ENABLE                       0x4000000
#define BF_BCH_DEBUG0_ROM_BIST_ENABLE(v)                    (((v) & 0x1) << 26)
#define BFM_BCH_DEBUG0_ROM_BIST_ENABLE(v)                   BM_BCH_DEBUG0_ROM_BIST_ENABLE
#define BF_BCH_DEBUG0_ROM_BIST_ENABLE_V(e)                  BF_BCH_DEBUG0_ROM_BIST_ENABLE(BV_BCH_DEBUG0_ROM_BIST_ENABLE__##e)
#define BFM_BCH_DEBUG0_ROM_BIST_ENABLE_V(v)                 BM_BCH_DEBUG0_ROM_BIST_ENABLE
#define BP_BCH_DEBUG0_ROM_BIST_COMPLETE                     25
#define BM_BCH_DEBUG0_ROM_BIST_COMPLETE                     0x2000000
#define BF_BCH_DEBUG0_ROM_BIST_COMPLETE(v)                  (((v) & 0x1) << 25)
#define BFM_BCH_DEBUG0_ROM_BIST_COMPLETE(v)                 BM_BCH_DEBUG0_ROM_BIST_COMPLETE
#define BF_BCH_DEBUG0_ROM_BIST_COMPLETE_V(e)                BF_BCH_DEBUG0_ROM_BIST_COMPLETE(BV_BCH_DEBUG0_ROM_BIST_COMPLETE__##e)
#define BFM_BCH_DEBUG0_ROM_BIST_COMPLETE_V(v)               BM_BCH_DEBUG0_ROM_BIST_COMPLETE
#define BP_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL             16
#define BM_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL             0x1ff0000
#define BV_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL__NORMAL     0x0
#define BV_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL__TEST_MODE  0x1
#define BF_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL(v)          (((v) & 0x1ff) << 16)
#define BFM_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL(v)         BM_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL
#define BF_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_V(e)        BF_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL(BV_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL__##e)
#define BFM_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_V(v)       BM_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL
#define BP_BCH_DEBUG0_KES_DEBUG_SHIFT_SYND                  15
#define BM_BCH_DEBUG0_KES_DEBUG_SHIFT_SYND                  0x8000
#define BF_BCH_DEBUG0_KES_DEBUG_SHIFT_SYND(v)               (((v) & 0x1) << 15)
#define BFM_BCH_DEBUG0_KES_DEBUG_SHIFT_SYND(v)              BM_BCH_DEBUG0_KES_DEBUG_SHIFT_SYND
#define BF_BCH_DEBUG0_KES_DEBUG_SHIFT_SYND_V(e)             BF_BCH_DEBUG0_KES_DEBUG_SHIFT_SYND(BV_BCH_DEBUG0_KES_DEBUG_SHIFT_SYND__##e)
#define BFM_BCH_DEBUG0_KES_DEBUG_SHIFT_SYND_V(v)            BM_BCH_DEBUG0_KES_DEBUG_SHIFT_SYND
#define BP_BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG                14
#define BM_BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG                0x4000
#define BV_BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG__DATA          0x1
#define BV_BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG__AUX           0x1
#define BF_BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG(v)             (((v) & 0x1) << 14)
#define BFM_BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG(v)            BM_BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG
#define BF_BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG_V(e)           BF_BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG(BV_BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG__##e)
#define BFM_BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG_V(v)          BM_BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG
#define BP_BCH_DEBUG0_KES_DEBUG_MODE4K                      13
#define BM_BCH_DEBUG0_KES_DEBUG_MODE4K                      0x2000
#define BV_BCH_DEBUG0_KES_DEBUG_MODE4K__4k                  0x1
#define BV_BCH_DEBUG0_KES_DEBUG_MODE4K__2k                  0x1
#define BF_BCH_DEBUG0_KES_DEBUG_MODE4K(v)                   (((v) & 0x1) << 13)
#define BFM_BCH_DEBUG0_KES_DEBUG_MODE4K(v)                  BM_BCH_DEBUG0_KES_DEBUG_MODE4K
#define BF_BCH_DEBUG0_KES_DEBUG_MODE4K_V(e)                 BF_BCH_DEBUG0_KES_DEBUG_MODE4K(BV_BCH_DEBUG0_KES_DEBUG_MODE4K__##e)
#define BFM_BCH_DEBUG0_KES_DEBUG_MODE4K_V(v)                BM_BCH_DEBUG0_KES_DEBUG_MODE4K
#define BP_BCH_DEBUG0_KES_DEBUG_KICK                        12
#define BM_BCH_DEBUG0_KES_DEBUG_KICK                        0x1000
#define BF_BCH_DEBUG0_KES_DEBUG_KICK(v)                     (((v) & 0x1) << 12)
#define BFM_BCH_DEBUG0_KES_DEBUG_KICK(v)                    BM_BCH_DEBUG0_KES_DEBUG_KICK
#define BF_BCH_DEBUG0_KES_DEBUG_KICK_V(e)                   BF_BCH_DEBUG0_KES_DEBUG_KICK(BV_BCH_DEBUG0_KES_DEBUG_KICK__##e)
#define BFM_BCH_DEBUG0_KES_DEBUG_KICK_V(v)                  BM_BCH_DEBUG0_KES_DEBUG_KICK
#define BP_BCH_DEBUG0_KES_STANDALONE                        11
#define BM_BCH_DEBUG0_KES_STANDALONE                        0x800
#define BV_BCH_DEBUG0_KES_STANDALONE__NORMAL                0x0
#define BV_BCH_DEBUG0_KES_STANDALONE__TEST_MODE             0x1
#define BF_BCH_DEBUG0_KES_STANDALONE(v)                     (((v) & 0x1) << 11)
#define BFM_BCH_DEBUG0_KES_STANDALONE(v)                    BM_BCH_DEBUG0_KES_STANDALONE
#define BF_BCH_DEBUG0_KES_STANDALONE_V(e)                   BF_BCH_DEBUG0_KES_STANDALONE(BV_BCH_DEBUG0_KES_STANDALONE__##e)
#define BFM_BCH_DEBUG0_KES_STANDALONE_V(v)                  BM_BCH_DEBUG0_KES_STANDALONE
#define BP_BCH_DEBUG0_KES_DEBUG_STEP                        10
#define BM_BCH_DEBUG0_KES_DEBUG_STEP                        0x400
#define BF_BCH_DEBUG0_KES_DEBUG_STEP(v)                     (((v) & 0x1) << 10)
#define BFM_BCH_DEBUG0_KES_DEBUG_STEP(v)                    BM_BCH_DEBUG0_KES_DEBUG_STEP
#define BF_BCH_DEBUG0_KES_DEBUG_STEP_V(e)                   BF_BCH_DEBUG0_KES_DEBUG_STEP(BV_BCH_DEBUG0_KES_DEBUG_STEP__##e)
#define BFM_BCH_DEBUG0_KES_DEBUG_STEP_V(v)                  BM_BCH_DEBUG0_KES_DEBUG_STEP
#define BP_BCH_DEBUG0_KES_DEBUG_STALL                       9
#define BM_BCH_DEBUG0_KES_DEBUG_STALL                       0x200
#define BV_BCH_DEBUG0_KES_DEBUG_STALL__NORMAL               0x0
#define BV_BCH_DEBUG0_KES_DEBUG_STALL__WAIT                 0x1
#define BF_BCH_DEBUG0_KES_DEBUG_STALL(v)                    (((v) & 0x1) << 9)
#define BFM_BCH_DEBUG0_KES_DEBUG_STALL(v)                   BM_BCH_DEBUG0_KES_DEBUG_STALL
#define BF_BCH_DEBUG0_KES_DEBUG_STALL_V(e)                  BF_BCH_DEBUG0_KES_DEBUG_STALL(BV_BCH_DEBUG0_KES_DEBUG_STALL__##e)
#define BFM_BCH_DEBUG0_KES_DEBUG_STALL_V(v)                 BM_BCH_DEBUG0_KES_DEBUG_STALL
#define BP_BCH_DEBUG0_BM_KES_TEST_BYPASS                    8
#define BM_BCH_DEBUG0_BM_KES_TEST_BYPASS                    0x100
#define BV_BCH_DEBUG0_BM_KES_TEST_BYPASS__NORMAL            0x0
#define BV_BCH_DEBUG0_BM_KES_TEST_BYPASS__TEST_MODE         0x1
#define BF_BCH_DEBUG0_BM_KES_TEST_BYPASS(v)                 (((v) & 0x1) << 8)
#define BFM_BCH_DEBUG0_BM_KES_TEST_BYPASS(v)                BM_BCH_DEBUG0_BM_KES_TEST_BYPASS
#define BF_BCH_DEBUG0_BM_KES_TEST_BYPASS_V(e)               BF_BCH_DEBUG0_BM_KES_TEST_BYPASS(BV_BCH_DEBUG0_BM_KES_TEST_BYPASS__##e)
#define BFM_BCH_DEBUG0_BM_KES_TEST_BYPASS_V(v)              BM_BCH_DEBUG0_BM_KES_TEST_BYPASS
#define BP_BCH_DEBUG0_RSVD0                                 6
#define BM_BCH_DEBUG0_RSVD0                                 0xc0
#define BF_BCH_DEBUG0_RSVD0(v)                              (((v) & 0x3) << 6)
#define BFM_BCH_DEBUG0_RSVD0(v)                             BM_BCH_DEBUG0_RSVD0
#define BF_BCH_DEBUG0_RSVD0_V(e)                            BF_BCH_DEBUG0_RSVD0(BV_BCH_DEBUG0_RSVD0__##e)
#define BFM_BCH_DEBUG0_RSVD0_V(v)                           BM_BCH_DEBUG0_RSVD0
#define BP_BCH_DEBUG0_DEBUG_REG_SELECT                      0
#define BM_BCH_DEBUG0_DEBUG_REG_SELECT                      0x3f
#define BF_BCH_DEBUG0_DEBUG_REG_SELECT(v)                   (((v) & 0x3f) << 0)
#define BFM_BCH_DEBUG0_DEBUG_REG_SELECT(v)                  BM_BCH_DEBUG0_DEBUG_REG_SELECT
#define BF_BCH_DEBUG0_DEBUG_REG_SELECT_V(e)                 BF_BCH_DEBUG0_DEBUG_REG_SELECT(BV_BCH_DEBUG0_DEBUG_REG_SELECT__##e)
#define BFM_BCH_DEBUG0_DEBUG_REG_SELECT_V(v)                BM_BCH_DEBUG0_DEBUG_REG_SELECT

#define HW_BCH_DBGKESREAD               HW(BCH_DBGKESREAD)
#define HWA_BCH_DBGKESREAD              (0x8000a000 + 0x110)
#define HWT_BCH_DBGKESREAD              HWIO_32_RW
#define HWN_BCH_DBGKESREAD              BCH_DBGKESREAD
#define HWI_BCH_DBGKESREAD              
#define BP_BCH_DBGKESREAD_VALUES        0
#define BM_BCH_DBGKESREAD_VALUES        0xffffffff
#define BF_BCH_DBGKESREAD_VALUES(v)     (((v) & 0xffffffff) << 0)
#define BFM_BCH_DBGKESREAD_VALUES(v)    BM_BCH_DBGKESREAD_VALUES
#define BF_BCH_DBGKESREAD_VALUES_V(e)   BF_BCH_DBGKESREAD_VALUES(BV_BCH_DBGKESREAD_VALUES__##e)
#define BFM_BCH_DBGKESREAD_VALUES_V(v)  BM_BCH_DBGKESREAD_VALUES

#define HW_BCH_DBGCSFEREAD              HW(BCH_DBGCSFEREAD)
#define HWA_BCH_DBGCSFEREAD             (0x8000a000 + 0x120)
#define HWT_BCH_DBGCSFEREAD             HWIO_32_RW
#define HWN_BCH_DBGCSFEREAD             BCH_DBGCSFEREAD
#define HWI_BCH_DBGCSFEREAD             
#define BP_BCH_DBGCSFEREAD_VALUES       0
#define BM_BCH_DBGCSFEREAD_VALUES       0xffffffff
#define BF_BCH_DBGCSFEREAD_VALUES(v)    (((v) & 0xffffffff) << 0)
#define BFM_BCH_DBGCSFEREAD_VALUES(v)   BM_BCH_DBGCSFEREAD_VALUES
#define BF_BCH_DBGCSFEREAD_VALUES_V(e)  BF_BCH_DBGCSFEREAD_VALUES(BV_BCH_DBGCSFEREAD_VALUES__##e)
#define BFM_BCH_DBGCSFEREAD_VALUES_V(v) BM_BCH_DBGCSFEREAD_VALUES

#define HW_BCH_DBGSYNDGENREAD               HW(BCH_DBGSYNDGENREAD)
#define HWA_BCH_DBGSYNDGENREAD              (0x8000a000 + 0x130)
#define HWT_BCH_DBGSYNDGENREAD              HWIO_32_RW
#define HWN_BCH_DBGSYNDGENREAD              BCH_DBGSYNDGENREAD
#define HWI_BCH_DBGSYNDGENREAD              
#define BP_BCH_DBGSYNDGENREAD_VALUES        0
#define BM_BCH_DBGSYNDGENREAD_VALUES        0xffffffff
#define BF_BCH_DBGSYNDGENREAD_VALUES(v)     (((v) & 0xffffffff) << 0)
#define BFM_BCH_DBGSYNDGENREAD_VALUES(v)    BM_BCH_DBGSYNDGENREAD_VALUES
#define BF_BCH_DBGSYNDGENREAD_VALUES_V(e)   BF_BCH_DBGSYNDGENREAD_VALUES(BV_BCH_DBGSYNDGENREAD_VALUES__##e)
#define BFM_BCH_DBGSYNDGENREAD_VALUES_V(v)  BM_BCH_DBGSYNDGENREAD_VALUES

#define HW_BCH_DBGAHBMREAD              HW(BCH_DBGAHBMREAD)
#define HWA_BCH_DBGAHBMREAD             (0x8000a000 + 0x140)
#define HWT_BCH_DBGAHBMREAD             HWIO_32_RW
#define HWN_BCH_DBGAHBMREAD             BCH_DBGAHBMREAD
#define HWI_BCH_DBGAHBMREAD             
#define BP_BCH_DBGAHBMREAD_VALUES       0
#define BM_BCH_DBGAHBMREAD_VALUES       0xffffffff
#define BF_BCH_DBGAHBMREAD_VALUES(v)    (((v) & 0xffffffff) << 0)
#define BFM_BCH_DBGAHBMREAD_VALUES(v)   BM_BCH_DBGAHBMREAD_VALUES
#define BF_BCH_DBGAHBMREAD_VALUES_V(e)  BF_BCH_DBGAHBMREAD_VALUES(BV_BCH_DBGAHBMREAD_VALUES__##e)
#define BFM_BCH_DBGAHBMREAD_VALUES_V(v) BM_BCH_DBGAHBMREAD_VALUES

#define HW_BCH_BLOCKNAME            HW(BCH_BLOCKNAME)
#define HWA_BCH_BLOCKNAME           (0x8000a000 + 0x150)
#define HWT_BCH_BLOCKNAME           HWIO_32_RW
#define HWN_BCH_BLOCKNAME           BCH_BLOCKNAME
#define HWI_BCH_BLOCKNAME           
#define BP_BCH_BLOCKNAME_NAME       0
#define BM_BCH_BLOCKNAME_NAME       0xffffffff
#define BF_BCH_BLOCKNAME_NAME(v)    (((v) & 0xffffffff) << 0)
#define BFM_BCH_BLOCKNAME_NAME(v)   BM_BCH_BLOCKNAME_NAME
#define BF_BCH_BLOCKNAME_NAME_V(e)  BF_BCH_BLOCKNAME_NAME(BV_BCH_BLOCKNAME_NAME__##e)
#define BFM_BCH_BLOCKNAME_NAME_V(v) BM_BCH_BLOCKNAME_NAME

#define HW_BCH_VERSION              HW(BCH_VERSION)
#define HWA_BCH_VERSION             (0x8000a000 + 0x160)
#define HWT_BCH_VERSION             HWIO_32_RW
#define HWN_BCH_VERSION             BCH_VERSION
#define HWI_BCH_VERSION             
#define BP_BCH_VERSION_MAJOR        24
#define BM_BCH_VERSION_MAJOR        0xff000000
#define BF_BCH_VERSION_MAJOR(v)     (((v) & 0xff) << 24)
#define BFM_BCH_VERSION_MAJOR(v)    BM_BCH_VERSION_MAJOR
#define BF_BCH_VERSION_MAJOR_V(e)   BF_BCH_VERSION_MAJOR(BV_BCH_VERSION_MAJOR__##e)
#define BFM_BCH_VERSION_MAJOR_V(v)  BM_BCH_VERSION_MAJOR
#define BP_BCH_VERSION_MINOR        16
#define BM_BCH_VERSION_MINOR        0xff0000
#define BF_BCH_VERSION_MINOR(v)     (((v) & 0xff) << 16)
#define BFM_BCH_VERSION_MINOR(v)    BM_BCH_VERSION_MINOR
#define BF_BCH_VERSION_MINOR_V(e)   BF_BCH_VERSION_MINOR(BV_BCH_VERSION_MINOR__##e)
#define BFM_BCH_VERSION_MINOR_V(v)  BM_BCH_VERSION_MINOR
#define BP_BCH_VERSION_STEP         0
#define BM_BCH_VERSION_STEP         0xffff
#define BF_BCH_VERSION_STEP(v)      (((v) & 0xffff) << 0)
#define BFM_BCH_VERSION_STEP(v)     BM_BCH_VERSION_STEP
#define BF_BCH_VERSION_STEP_V(e)    BF_BCH_VERSION_STEP(BV_BCH_VERSION_STEP__##e)
#define BFM_BCH_VERSION_STEP_V(v)   BM_BCH_VERSION_STEP

#endif /* __HEADERGEN_IMX233_BCH_H__*/
