/***************************************************************************
 *             __________               __   ___.
 *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
 *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
 *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
 *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
 *                     \/            \/     \/    \/            \/
 * This file was automatically generated by headergen, DO NOT EDIT it.
 * headergen version: 3.0.0
 * imx233 version: 2.4.0
 * imx233 authors: Amaury Pouly
 *
 * Copyright (C) 2015 by the authors
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
 * KIND, either express or implied.
 *
 ****************************************************************************/
#ifndef __HEADERGEN_IMX233_UARTDBG_H__
#define __HEADERGEN_IMX233_UARTDBG_H__

#define HW_UARTDBG_DR                   HW(UARTDBG_DR)
#define HWA_UARTDBG_DR                  (0x80070000 + 0x0)
#define HWT_UARTDBG_DR                  HWIO_32_RW
#define HWN_UARTDBG_DR                  UARTDBG_DR
#define HWI_UARTDBG_DR                  
#define BP_UARTDBG_DR_UNAVAILABLE       16
#define BM_UARTDBG_DR_UNAVAILABLE       0xffff0000
#define BF_UARTDBG_DR_UNAVAILABLE(v)    (((v) & 0xffff) << 16)
#define BFM_UARTDBG_DR_UNAVAILABLE(v)   BM_UARTDBG_DR_UNAVAILABLE
#define BF_UARTDBG_DR_UNAVAILABLE_V(e)  BF_UARTDBG_DR_UNAVAILABLE(BV_UARTDBG_DR_UNAVAILABLE__##e)
#define BFM_UARTDBG_DR_UNAVAILABLE_V(v) BM_UARTDBG_DR_UNAVAILABLE
#define BP_UARTDBG_DR_RESERVED          12
#define BM_UARTDBG_DR_RESERVED          0xf000
#define BF_UARTDBG_DR_RESERVED(v)       (((v) & 0xf) << 12)
#define BFM_UARTDBG_DR_RESERVED(v)      BM_UARTDBG_DR_RESERVED
#define BF_UARTDBG_DR_RESERVED_V(e)     BF_UARTDBG_DR_RESERVED(BV_UARTDBG_DR_RESERVED__##e)
#define BFM_UARTDBG_DR_RESERVED_V(v)    BM_UARTDBG_DR_RESERVED
#define BP_UARTDBG_DR_OE                11
#define BM_UARTDBG_DR_OE                0x800
#define BF_UARTDBG_DR_OE(v)             (((v) & 0x1) << 11)
#define BFM_UARTDBG_DR_OE(v)            BM_UARTDBG_DR_OE
#define BF_UARTDBG_DR_OE_V(e)           BF_UARTDBG_DR_OE(BV_UARTDBG_DR_OE__##e)
#define BFM_UARTDBG_DR_OE_V(v)          BM_UARTDBG_DR_OE
#define BP_UARTDBG_DR_BE                10
#define BM_UARTDBG_DR_BE                0x400
#define BF_UARTDBG_DR_BE(v)             (((v) & 0x1) << 10)
#define BFM_UARTDBG_DR_BE(v)            BM_UARTDBG_DR_BE
#define BF_UARTDBG_DR_BE_V(e)           BF_UARTDBG_DR_BE(BV_UARTDBG_DR_BE__##e)
#define BFM_UARTDBG_DR_BE_V(v)          BM_UARTDBG_DR_BE
#define BP_UARTDBG_DR_PE                9
#define BM_UARTDBG_DR_PE                0x200
#define BF_UARTDBG_DR_PE(v)             (((v) & 0x1) << 9)
#define BFM_UARTDBG_DR_PE(v)            BM_UARTDBG_DR_PE
#define BF_UARTDBG_DR_PE_V(e)           BF_UARTDBG_DR_PE(BV_UARTDBG_DR_PE__##e)
#define BFM_UARTDBG_DR_PE_V(v)          BM_UARTDBG_DR_PE
#define BP_UARTDBG_DR_FE                8
#define BM_UARTDBG_DR_FE                0x100
#define BF_UARTDBG_DR_FE(v)             (((v) & 0x1) << 8)
#define BFM_UARTDBG_DR_FE(v)            BM_UARTDBG_DR_FE
#define BF_UARTDBG_DR_FE_V(e)           BF_UARTDBG_DR_FE(BV_UARTDBG_DR_FE__##e)
#define BFM_UARTDBG_DR_FE_V(v)          BM_UARTDBG_DR_FE
#define BP_UARTDBG_DR_DATA              0
#define BM_UARTDBG_DR_DATA              0xff
#define BF_UARTDBG_DR_DATA(v)           (((v) & 0xff) << 0)
#define BFM_UARTDBG_DR_DATA(v)          BM_UARTDBG_DR_DATA
#define BF_UARTDBG_DR_DATA_V(e)         BF_UARTDBG_DR_DATA(BV_UARTDBG_DR_DATA__##e)
#define BFM_UARTDBG_DR_DATA_V(v)        BM_UARTDBG_DR_DATA

#define HW_UARTDBG_RSR_ECR                      HW(UARTDBG_RSR_ECR)
#define HWA_UARTDBG_RSR_ECR                     (0x80070000 + 0x4)
#define HWT_UARTDBG_RSR_ECR                     HWIO_32_RW
#define HWN_UARTDBG_RSR_ECR                     UARTDBG_RSR_ECR
#define HWI_UARTDBG_RSR_ECR                     
#define BP_UARTDBG_RSR_ECR_UNAVAILABLE          8
#define BM_UARTDBG_RSR_ECR_UNAVAILABLE          0xffffff00
#define BF_UARTDBG_RSR_ECR_UNAVAILABLE(v)       (((v) & 0xffffff) << 8)
#define BFM_UARTDBG_RSR_ECR_UNAVAILABLE(v)      BM_UARTDBG_RSR_ECR_UNAVAILABLE
#define BF_UARTDBG_RSR_ECR_UNAVAILABLE_V(e)     BF_UARTDBG_RSR_ECR_UNAVAILABLE(BV_UARTDBG_RSR_ECR_UNAVAILABLE__##e)
#define BFM_UARTDBG_RSR_ECR_UNAVAILABLE_V(v)    BM_UARTDBG_RSR_ECR_UNAVAILABLE
#define BP_UARTDBG_RSR_ECR_EC                   4
#define BM_UARTDBG_RSR_ECR_EC                   0xf0
#define BF_UARTDBG_RSR_ECR_EC(v)                (((v) & 0xf) << 4)
#define BFM_UARTDBG_RSR_ECR_EC(v)               BM_UARTDBG_RSR_ECR_EC
#define BF_UARTDBG_RSR_ECR_EC_V(e)              BF_UARTDBG_RSR_ECR_EC(BV_UARTDBG_RSR_ECR_EC__##e)
#define BFM_UARTDBG_RSR_ECR_EC_V(v)             BM_UARTDBG_RSR_ECR_EC
#define BP_UARTDBG_RSR_ECR_OE                   3
#define BM_UARTDBG_RSR_ECR_OE                   0x8
#define BF_UARTDBG_RSR_ECR_OE(v)                (((v) & 0x1) << 3)
#define BFM_UARTDBG_RSR_ECR_OE(v)               BM_UARTDBG_RSR_ECR_OE
#define BF_UARTDBG_RSR_ECR_OE_V(e)              BF_UARTDBG_RSR_ECR_OE(BV_UARTDBG_RSR_ECR_OE__##e)
#define BFM_UARTDBG_RSR_ECR_OE_V(v)             BM_UARTDBG_RSR_ECR_OE
#define BP_UARTDBG_RSR_ECR_BE                   2
#define BM_UARTDBG_RSR_ECR_BE                   0x4
#define BF_UARTDBG_RSR_ECR_BE(v)                (((v) & 0x1) << 2)
#define BFM_UARTDBG_RSR_ECR_BE(v)               BM_UARTDBG_RSR_ECR_BE
#define BF_UARTDBG_RSR_ECR_BE_V(e)              BF_UARTDBG_RSR_ECR_BE(BV_UARTDBG_RSR_ECR_BE__##e)
#define BFM_UARTDBG_RSR_ECR_BE_V(v)             BM_UARTDBG_RSR_ECR_BE
#define BP_UARTDBG_RSR_ECR_PE                   1
#define BM_UARTDBG_RSR_ECR_PE                   0x2
#define BF_UARTDBG_RSR_ECR_PE(v)                (((v) & 0x1) << 1)
#define BFM_UARTDBG_RSR_ECR_PE(v)               BM_UARTDBG_RSR_ECR_PE
#define BF_UARTDBG_RSR_ECR_PE_V(e)              BF_UARTDBG_RSR_ECR_PE(BV_UARTDBG_RSR_ECR_PE__##e)
#define BFM_UARTDBG_RSR_ECR_PE_V(v)             BM_UARTDBG_RSR_ECR_PE
#define BP_UARTDBG_RSR_ECR_FE                   0
#define BM_UARTDBG_RSR_ECR_FE                   0x1
#define BF_UARTDBG_RSR_ECR_FE(v)                (((v) & 0x1) << 0)
#define BFM_UARTDBG_RSR_ECR_FE(v)               BM_UARTDBG_RSR_ECR_FE
#define BF_UARTDBG_RSR_ECR_FE_V(e)              BF_UARTDBG_RSR_ECR_FE(BV_UARTDBG_RSR_ECR_FE__##e)
#define BFM_UARTDBG_RSR_ECR_FE_V(v)             BM_UARTDBG_RSR_ECR_FE

#define HW_UARTDBG_FR                   HW(UARTDBG_FR)
#define HWA_UARTDBG_FR                  (0x80070000 + 0x18)
#define HWT_UARTDBG_FR                  HWIO_32_RW
#define HWN_UARTDBG_FR                  UARTDBG_FR
#define HWI_UARTDBG_FR                  
#define BP_UARTDBG_FR_UNAVAILABLE       16
#define BM_UARTDBG_FR_UNAVAILABLE       0xffff0000
#define BF_UARTDBG_FR_UNAVAILABLE(v)    (((v) & 0xffff) << 16)
#define BFM_UARTDBG_FR_UNAVAILABLE(v)   BM_UARTDBG_FR_UNAVAILABLE
#define BF_UARTDBG_FR_UNAVAILABLE_V(e)  BF_UARTDBG_FR_UNAVAILABLE(BV_UARTDBG_FR_UNAVAILABLE__##e)
#define BFM_UARTDBG_FR_UNAVAILABLE_V(v) BM_UARTDBG_FR_UNAVAILABLE
#define BP_UARTDBG_FR_RESERVED          9
#define BM_UARTDBG_FR_RESERVED          0xfe00
#define BF_UARTDBG_FR_RESERVED(v)       (((v) & 0x7f) << 9)
#define BFM_UARTDBG_FR_RESERVED(v)      BM_UARTDBG_FR_RESERVED
#define BF_UARTDBG_FR_RESERVED_V(e)     BF_UARTDBG_FR_RESERVED(BV_UARTDBG_FR_RESERVED__##e)
#define BFM_UARTDBG_FR_RESERVED_V(v)    BM_UARTDBG_FR_RESERVED
#define BP_UARTDBG_FR_RI                8
#define BM_UARTDBG_FR_RI                0x100
#define BF_UARTDBG_FR_RI(v)             (((v) & 0x1) << 8)
#define BFM_UARTDBG_FR_RI(v)            BM_UARTDBG_FR_RI
#define BF_UARTDBG_FR_RI_V(e)           BF_UARTDBG_FR_RI(BV_UARTDBG_FR_RI__##e)
#define BFM_UARTDBG_FR_RI_V(v)          BM_UARTDBG_FR_RI
#define BP_UARTDBG_FR_TXFE              7
#define BM_UARTDBG_FR_TXFE              0x80
#define BF_UARTDBG_FR_TXFE(v)           (((v) & 0x1) << 7)
#define BFM_UARTDBG_FR_TXFE(v)          BM_UARTDBG_FR_TXFE
#define BF_UARTDBG_FR_TXFE_V(e)         BF_UARTDBG_FR_TXFE(BV_UARTDBG_FR_TXFE__##e)
#define BFM_UARTDBG_FR_TXFE_V(v)        BM_UARTDBG_FR_TXFE
#define BP_UARTDBG_FR_RXFF              6
#define BM_UARTDBG_FR_RXFF              0x40
#define BF_UARTDBG_FR_RXFF(v)           (((v) & 0x1) << 6)
#define BFM_UARTDBG_FR_RXFF(v)          BM_UARTDBG_FR_RXFF
#define BF_UARTDBG_FR_RXFF_V(e)         BF_UARTDBG_FR_RXFF(BV_UARTDBG_FR_RXFF__##e)
#define BFM_UARTDBG_FR_RXFF_V(v)        BM_UARTDBG_FR_RXFF
#define BP_UARTDBG_FR_TXFF              5
#define BM_UARTDBG_FR_TXFF              0x20
#define BF_UARTDBG_FR_TXFF(v)           (((v) & 0x1) << 5)
#define BFM_UARTDBG_FR_TXFF(v)          BM_UARTDBG_FR_TXFF
#define BF_UARTDBG_FR_TXFF_V(e)         BF_UARTDBG_FR_TXFF(BV_UARTDBG_FR_TXFF__##e)
#define BFM_UARTDBG_FR_TXFF_V(v)        BM_UARTDBG_FR_TXFF
#define BP_UARTDBG_FR_RXFE              4
#define BM_UARTDBG_FR_RXFE              0x10
#define BF_UARTDBG_FR_RXFE(v)           (((v) & 0x1) << 4)
#define BFM_UARTDBG_FR_RXFE(v)          BM_UARTDBG_FR_RXFE
#define BF_UARTDBG_FR_RXFE_V(e)         BF_UARTDBG_FR_RXFE(BV_UARTDBG_FR_RXFE__##e)
#define BFM_UARTDBG_FR_RXFE_V(v)        BM_UARTDBG_FR_RXFE
#define BP_UARTDBG_FR_BUSY              3
#define BM_UARTDBG_FR_BUSY              0x8
#define BF_UARTDBG_FR_BUSY(v)           (((v) & 0x1) << 3)
#define BFM_UARTDBG_FR_BUSY(v)          BM_UARTDBG_FR_BUSY
#define BF_UARTDBG_FR_BUSY_V(e)         BF_UARTDBG_FR_BUSY(BV_UARTDBG_FR_BUSY__##e)
#define BFM_UARTDBG_FR_BUSY_V(v)        BM_UARTDBG_FR_BUSY
#define BP_UARTDBG_FR_DCD               2
#define BM_UARTDBG_FR_DCD               0x4
#define BF_UARTDBG_FR_DCD(v)            (((v) & 0x1) << 2)
#define BFM_UARTDBG_FR_DCD(v)           BM_UARTDBG_FR_DCD
#define BF_UARTDBG_FR_DCD_V(e)          BF_UARTDBG_FR_DCD(BV_UARTDBG_FR_DCD__##e)
#define BFM_UARTDBG_FR_DCD_V(v)         BM_UARTDBG_FR_DCD
#define BP_UARTDBG_FR_DSR               1
#define BM_UARTDBG_FR_DSR               0x2
#define BF_UARTDBG_FR_DSR(v)            (((v) & 0x1) << 1)
#define BFM_UARTDBG_FR_DSR(v)           BM_UARTDBG_FR_DSR
#define BF_UARTDBG_FR_DSR_V(e)          BF_UARTDBG_FR_DSR(BV_UARTDBG_FR_DSR__##e)
#define BFM_UARTDBG_FR_DSR_V(v)         BM_UARTDBG_FR_DSR
#define BP_UARTDBG_FR_CTS               0
#define BM_UARTDBG_FR_CTS               0x1
#define BF_UARTDBG_FR_CTS(v)            (((v) & 0x1) << 0)
#define BFM_UARTDBG_FR_CTS(v)           BM_UARTDBG_FR_CTS
#define BF_UARTDBG_FR_CTS_V(e)          BF_UARTDBG_FR_CTS(BV_UARTDBG_FR_CTS__##e)
#define BFM_UARTDBG_FR_CTS_V(v)         BM_UARTDBG_FR_CTS

#define HW_UARTDBG_ILPR                     HW(UARTDBG_ILPR)
#define HWA_UARTDBG_ILPR                    (0x80070000 + 0x20)
#define HWT_UARTDBG_ILPR                    HWIO_32_RW
#define HWN_UARTDBG_ILPR                    UARTDBG_ILPR
#define HWI_UARTDBG_ILPR                    
#define BP_UARTDBG_ILPR_UNAVAILABLE         8
#define BM_UARTDBG_ILPR_UNAVAILABLE         0xffffff00
#define BF_UARTDBG_ILPR_UNAVAILABLE(v)      (((v) & 0xffffff) << 8)
#define BFM_UARTDBG_ILPR_UNAVAILABLE(v)     BM_UARTDBG_ILPR_UNAVAILABLE
#define BF_UARTDBG_ILPR_UNAVAILABLE_V(e)    BF_UARTDBG_ILPR_UNAVAILABLE(BV_UARTDBG_ILPR_UNAVAILABLE__##e)
#define BFM_UARTDBG_ILPR_UNAVAILABLE_V(v)   BM_UARTDBG_ILPR_UNAVAILABLE
#define BP_UARTDBG_ILPR_ILPDVSR             0
#define BM_UARTDBG_ILPR_ILPDVSR             0xff
#define BF_UARTDBG_ILPR_ILPDVSR(v)          (((v) & 0xff) << 0)
#define BFM_UARTDBG_ILPR_ILPDVSR(v)         BM_UARTDBG_ILPR_ILPDVSR
#define BF_UARTDBG_ILPR_ILPDVSR_V(e)        BF_UARTDBG_ILPR_ILPDVSR(BV_UARTDBG_ILPR_ILPDVSR__##e)
#define BFM_UARTDBG_ILPR_ILPDVSR_V(v)       BM_UARTDBG_ILPR_ILPDVSR

#define HW_UARTDBG_IBRD                     HW(UARTDBG_IBRD)
#define HWA_UARTDBG_IBRD                    (0x80070000 + 0x24)
#define HWT_UARTDBG_IBRD                    HWIO_32_RW
#define HWN_UARTDBG_IBRD                    UARTDBG_IBRD
#define HWI_UARTDBG_IBRD                    
#define BP_UARTDBG_IBRD_UNAVAILABLE         16
#define BM_UARTDBG_IBRD_UNAVAILABLE         0xffff0000
#define BF_UARTDBG_IBRD_UNAVAILABLE(v)      (((v) & 0xffff) << 16)
#define BFM_UARTDBG_IBRD_UNAVAILABLE(v)     BM_UARTDBG_IBRD_UNAVAILABLE
#define BF_UARTDBG_IBRD_UNAVAILABLE_V(e)    BF_UARTDBG_IBRD_UNAVAILABLE(BV_UARTDBG_IBRD_UNAVAILABLE__##e)
#define BFM_UARTDBG_IBRD_UNAVAILABLE_V(v)   BM_UARTDBG_IBRD_UNAVAILABLE
#define BP_UARTDBG_IBRD_BAUD_DIVINT         0
#define BM_UARTDBG_IBRD_BAUD_DIVINT         0xffff
#define BF_UARTDBG_IBRD_BAUD_DIVINT(v)      (((v) & 0xffff) << 0)
#define BFM_UARTDBG_IBRD_BAUD_DIVINT(v)     BM_UARTDBG_IBRD_BAUD_DIVINT
#define BF_UARTDBG_IBRD_BAUD_DIVINT_V(e)    BF_UARTDBG_IBRD_BAUD_DIVINT(BV_UARTDBG_IBRD_BAUD_DIVINT__##e)
#define BFM_UARTDBG_IBRD_BAUD_DIVINT_V(v)   BM_UARTDBG_IBRD_BAUD_DIVINT

#define HW_UARTDBG_FBRD                     HW(UARTDBG_FBRD)
#define HWA_UARTDBG_FBRD                    (0x80070000 + 0x28)
#define HWT_UARTDBG_FBRD                    HWIO_32_RW
#define HWN_UARTDBG_FBRD                    UARTDBG_FBRD
#define HWI_UARTDBG_FBRD                    
#define BP_UARTDBG_FBRD_UNAVAILABLE         8
#define BM_UARTDBG_FBRD_UNAVAILABLE         0xffffff00
#define BF_UARTDBG_FBRD_UNAVAILABLE(v)      (((v) & 0xffffff) << 8)
#define BFM_UARTDBG_FBRD_UNAVAILABLE(v)     BM_UARTDBG_FBRD_UNAVAILABLE
#define BF_UARTDBG_FBRD_UNAVAILABLE_V(e)    BF_UARTDBG_FBRD_UNAVAILABLE(BV_UARTDBG_FBRD_UNAVAILABLE__##e)
#define BFM_UARTDBG_FBRD_UNAVAILABLE_V(v)   BM_UARTDBG_FBRD_UNAVAILABLE
#define BP_UARTDBG_FBRD_RESERVED            6
#define BM_UARTDBG_FBRD_RESERVED            0xc0
#define BF_UARTDBG_FBRD_RESERVED(v)         (((v) & 0x3) << 6)
#define BFM_UARTDBG_FBRD_RESERVED(v)        BM_UARTDBG_FBRD_RESERVED
#define BF_UARTDBG_FBRD_RESERVED_V(e)       BF_UARTDBG_FBRD_RESERVED(BV_UARTDBG_FBRD_RESERVED__##e)
#define BFM_UARTDBG_FBRD_RESERVED_V(v)      BM_UARTDBG_FBRD_RESERVED
#define BP_UARTDBG_FBRD_BAUD_DIVFRAC        0
#define BM_UARTDBG_FBRD_BAUD_DIVFRAC        0x3f
#define BF_UARTDBG_FBRD_BAUD_DIVFRAC(v)     (((v) & 0x3f) << 0)
#define BFM_UARTDBG_FBRD_BAUD_DIVFRAC(v)    BM_UARTDBG_FBRD_BAUD_DIVFRAC
#define BF_UARTDBG_FBRD_BAUD_DIVFRAC_V(e)   BF_UARTDBG_FBRD_BAUD_DIVFRAC(BV_UARTDBG_FBRD_BAUD_DIVFRAC__##e)
#define BFM_UARTDBG_FBRD_BAUD_DIVFRAC_V(v)  BM_UARTDBG_FBRD_BAUD_DIVFRAC

#define HW_UARTDBG_LCR_H                    HW(UARTDBG_LCR_H)
#define HWA_UARTDBG_LCR_H                   (0x80070000 + 0x2c)
#define HWT_UARTDBG_LCR_H                   HWIO_32_RW
#define HWN_UARTDBG_LCR_H                   UARTDBG_LCR_H
#define HWI_UARTDBG_LCR_H                   
#define BP_UARTDBG_LCR_H_UNAVAILABLE        16
#define BM_UARTDBG_LCR_H_UNAVAILABLE        0xffff0000
#define BF_UARTDBG_LCR_H_UNAVAILABLE(v)     (((v) & 0xffff) << 16)
#define BFM_UARTDBG_LCR_H_UNAVAILABLE(v)    BM_UARTDBG_LCR_H_UNAVAILABLE
#define BF_UARTDBG_LCR_H_UNAVAILABLE_V(e)   BF_UARTDBG_LCR_H_UNAVAILABLE(BV_UARTDBG_LCR_H_UNAVAILABLE__##e)
#define BFM_UARTDBG_LCR_H_UNAVAILABLE_V(v)  BM_UARTDBG_LCR_H_UNAVAILABLE
#define BP_UARTDBG_LCR_H_RESERVED           8
#define BM_UARTDBG_LCR_H_RESERVED           0xff00
#define BF_UARTDBG_LCR_H_RESERVED(v)        (((v) & 0xff) << 8)
#define BFM_UARTDBG_LCR_H_RESERVED(v)       BM_UARTDBG_LCR_H_RESERVED
#define BF_UARTDBG_LCR_H_RESERVED_V(e)      BF_UARTDBG_LCR_H_RESERVED(BV_UARTDBG_LCR_H_RESERVED__##e)
#define BFM_UARTDBG_LCR_H_RESERVED_V(v)     BM_UARTDBG_LCR_H_RESERVED
#define BP_UARTDBG_LCR_H_SPS                7
#define BM_UARTDBG_LCR_H_SPS                0x80
#define BF_UARTDBG_LCR_H_SPS(v)             (((v) & 0x1) << 7)
#define BFM_UARTDBG_LCR_H_SPS(v)            BM_UARTDBG_LCR_H_SPS
#define BF_UARTDBG_LCR_H_SPS_V(e)           BF_UARTDBG_LCR_H_SPS(BV_UARTDBG_LCR_H_SPS__##e)
#define BFM_UARTDBG_LCR_H_SPS_V(v)          BM_UARTDBG_LCR_H_SPS
#define BP_UARTDBG_LCR_H_WLEN               5
#define BM_UARTDBG_LCR_H_WLEN               0x60
#define BF_UARTDBG_LCR_H_WLEN(v)            (((v) & 0x3) << 5)
#define BFM_UARTDBG_LCR_H_WLEN(v)           BM_UARTDBG_LCR_H_WLEN
#define BF_UARTDBG_LCR_H_WLEN_V(e)          BF_UARTDBG_LCR_H_WLEN(BV_UARTDBG_LCR_H_WLEN__##e)
#define BFM_UARTDBG_LCR_H_WLEN_V(v)         BM_UARTDBG_LCR_H_WLEN
#define BP_UARTDBG_LCR_H_FEN                4
#define BM_UARTDBG_LCR_H_FEN                0x10
#define BF_UARTDBG_LCR_H_FEN(v)             (((v) & 0x1) << 4)
#define BFM_UARTDBG_LCR_H_FEN(v)            BM_UARTDBG_LCR_H_FEN
#define BF_UARTDBG_LCR_H_FEN_V(e)           BF_UARTDBG_LCR_H_FEN(BV_UARTDBG_LCR_H_FEN__##e)
#define BFM_UARTDBG_LCR_H_FEN_V(v)          BM_UARTDBG_LCR_H_FEN
#define BP_UARTDBG_LCR_H_STP2               3
#define BM_UARTDBG_LCR_H_STP2               0x8
#define BF_UARTDBG_LCR_H_STP2(v)            (((v) & 0x1) << 3)
#define BFM_UARTDBG_LCR_H_STP2(v)           BM_UARTDBG_LCR_H_STP2
#define BF_UARTDBG_LCR_H_STP2_V(e)          BF_UARTDBG_LCR_H_STP2(BV_UARTDBG_LCR_H_STP2__##e)
#define BFM_UARTDBG_LCR_H_STP2_V(v)         BM_UARTDBG_LCR_H_STP2
#define BP_UARTDBG_LCR_H_EPS                2
#define BM_UARTDBG_LCR_H_EPS                0x4
#define BF_UARTDBG_LCR_H_EPS(v)             (((v) & 0x1) << 2)
#define BFM_UARTDBG_LCR_H_EPS(v)            BM_UARTDBG_LCR_H_EPS
#define BF_UARTDBG_LCR_H_EPS_V(e)           BF_UARTDBG_LCR_H_EPS(BV_UARTDBG_LCR_H_EPS__##e)
#define BFM_UARTDBG_LCR_H_EPS_V(v)          BM_UARTDBG_LCR_H_EPS
#define BP_UARTDBG_LCR_H_PEN                1
#define BM_UARTDBG_LCR_H_PEN                0x2
#define BF_UARTDBG_LCR_H_PEN(v)             (((v) & 0x1) << 1)
#define BFM_UARTDBG_LCR_H_PEN(v)            BM_UARTDBG_LCR_H_PEN
#define BF_UARTDBG_LCR_H_PEN_V(e)           BF_UARTDBG_LCR_H_PEN(BV_UARTDBG_LCR_H_PEN__##e)
#define BFM_UARTDBG_LCR_H_PEN_V(v)          BM_UARTDBG_LCR_H_PEN
#define BP_UARTDBG_LCR_H_BRK                0
#define BM_UARTDBG_LCR_H_BRK                0x1
#define BF_UARTDBG_LCR_H_BRK(v)             (((v) & 0x1) << 0)
#define BFM_UARTDBG_LCR_H_BRK(v)            BM_UARTDBG_LCR_H_BRK
#define BF_UARTDBG_LCR_H_BRK_V(e)           BF_UARTDBG_LCR_H_BRK(BV_UARTDBG_LCR_H_BRK__##e)
#define BFM_UARTDBG_LCR_H_BRK_V(v)          BM_UARTDBG_LCR_H_BRK

#define HW_UARTDBG_CR                   HW(UARTDBG_CR)
#define HWA_UARTDBG_CR                  (0x80070000 + 0x30)
#define HWT_UARTDBG_CR                  HWIO_32_RW
#define HWN_UARTDBG_CR                  UARTDBG_CR
#define HWI_UARTDBG_CR                  
#define BP_UARTDBG_CR_UNAVAILABLE       16
#define BM_UARTDBG_CR_UNAVAILABLE       0xffff0000
#define BF_UARTDBG_CR_UNAVAILABLE(v)    (((v) & 0xffff) << 16)
#define BFM_UARTDBG_CR_UNAVAILABLE(v)   BM_UARTDBG_CR_UNAVAILABLE
#define BF_UARTDBG_CR_UNAVAILABLE_V(e)  BF_UARTDBG_CR_UNAVAILABLE(BV_UARTDBG_CR_UNAVAILABLE__##e)
#define BFM_UARTDBG_CR_UNAVAILABLE_V(v) BM_UARTDBG_CR_UNAVAILABLE
#define BP_UARTDBG_CR_CTSEN             15
#define BM_UARTDBG_CR_CTSEN             0x8000
#define BF_UARTDBG_CR_CTSEN(v)          (((v) & 0x1) << 15)
#define BFM_UARTDBG_CR_CTSEN(v)         BM_UARTDBG_CR_CTSEN
#define BF_UARTDBG_CR_CTSEN_V(e)        BF_UARTDBG_CR_CTSEN(BV_UARTDBG_CR_CTSEN__##e)
#define BFM_UARTDBG_CR_CTSEN_V(v)       BM_UARTDBG_CR_CTSEN
#define BP_UARTDBG_CR_RTSEN             14
#define BM_UARTDBG_CR_RTSEN             0x4000
#define BF_UARTDBG_CR_RTSEN(v)          (((v) & 0x1) << 14)
#define BFM_UARTDBG_CR_RTSEN(v)         BM_UARTDBG_CR_RTSEN
#define BF_UARTDBG_CR_RTSEN_V(e)        BF_UARTDBG_CR_RTSEN(BV_UARTDBG_CR_RTSEN__##e)
#define BFM_UARTDBG_CR_RTSEN_V(v)       BM_UARTDBG_CR_RTSEN
#define BP_UARTDBG_CR_OUT2              13
#define BM_UARTDBG_CR_OUT2              0x2000
#define BF_UARTDBG_CR_OUT2(v)           (((v) & 0x1) << 13)
#define BFM_UARTDBG_CR_OUT2(v)          BM_UARTDBG_CR_OUT2
#define BF_UARTDBG_CR_OUT2_V(e)         BF_UARTDBG_CR_OUT2(BV_UARTDBG_CR_OUT2__##e)
#define BFM_UARTDBG_CR_OUT2_V(v)        BM_UARTDBG_CR_OUT2
#define BP_UARTDBG_CR_OUT1              12
#define BM_UARTDBG_CR_OUT1              0x1000
#define BF_UARTDBG_CR_OUT1(v)           (((v) & 0x1) << 12)
#define BFM_UARTDBG_CR_OUT1(v)          BM_UARTDBG_CR_OUT1
#define BF_UARTDBG_CR_OUT1_V(e)         BF_UARTDBG_CR_OUT1(BV_UARTDBG_CR_OUT1__##e)
#define BFM_UARTDBG_CR_OUT1_V(v)        BM_UARTDBG_CR_OUT1
#define BP_UARTDBG_CR_RTS               11
#define BM_UARTDBG_CR_RTS               0x800
#define BF_UARTDBG_CR_RTS(v)            (((v) & 0x1) << 11)
#define BFM_UARTDBG_CR_RTS(v)           BM_UARTDBG_CR_RTS
#define BF_UARTDBG_CR_RTS_V(e)          BF_UARTDBG_CR_RTS(BV_UARTDBG_CR_RTS__##e)
#define BFM_UARTDBG_CR_RTS_V(v)         BM_UARTDBG_CR_RTS
#define BP_UARTDBG_CR_DTR               10
#define BM_UARTDBG_CR_DTR               0x400
#define BF_UARTDBG_CR_DTR(v)            (((v) & 0x1) << 10)
#define BFM_UARTDBG_CR_DTR(v)           BM_UARTDBG_CR_DTR
#define BF_UARTDBG_CR_DTR_V(e)          BF_UARTDBG_CR_DTR(BV_UARTDBG_CR_DTR__##e)
#define BFM_UARTDBG_CR_DTR_V(v)         BM_UARTDBG_CR_DTR
#define BP_UARTDBG_CR_RXE               9
#define BM_UARTDBG_CR_RXE               0x200
#define BF_UARTDBG_CR_RXE(v)            (((v) & 0x1) << 9)
#define BFM_UARTDBG_CR_RXE(v)           BM_UARTDBG_CR_RXE
#define BF_UARTDBG_CR_RXE_V(e)          BF_UARTDBG_CR_RXE(BV_UARTDBG_CR_RXE__##e)
#define BFM_UARTDBG_CR_RXE_V(v)         BM_UARTDBG_CR_RXE
#define BP_UARTDBG_CR_TXE               8
#define BM_UARTDBG_CR_TXE               0x100
#define BF_UARTDBG_CR_TXE(v)            (((v) & 0x1) << 8)
#define BFM_UARTDBG_CR_TXE(v)           BM_UARTDBG_CR_TXE
#define BF_UARTDBG_CR_TXE_V(e)          BF_UARTDBG_CR_TXE(BV_UARTDBG_CR_TXE__##e)
#define BFM_UARTDBG_CR_TXE_V(v)         BM_UARTDBG_CR_TXE
#define BP_UARTDBG_CR_LBE               7
#define BM_UARTDBG_CR_LBE               0x80
#define BF_UARTDBG_CR_LBE(v)            (((v) & 0x1) << 7)
#define BFM_UARTDBG_CR_LBE(v)           BM_UARTDBG_CR_LBE
#define BF_UARTDBG_CR_LBE_V(e)          BF_UARTDBG_CR_LBE(BV_UARTDBG_CR_LBE__##e)
#define BFM_UARTDBG_CR_LBE_V(v)         BM_UARTDBG_CR_LBE
#define BP_UARTDBG_CR_RESERVED          3
#define BM_UARTDBG_CR_RESERVED          0x78
#define BF_UARTDBG_CR_RESERVED(v)       (((v) & 0xf) << 3)
#define BFM_UARTDBG_CR_RESERVED(v)      BM_UARTDBG_CR_RESERVED
#define BF_UARTDBG_CR_RESERVED_V(e)     BF_UARTDBG_CR_RESERVED(BV_UARTDBG_CR_RESERVED__##e)
#define BFM_UARTDBG_CR_RESERVED_V(v)    BM_UARTDBG_CR_RESERVED
#define BP_UARTDBG_CR_SIRLP             2
#define BM_UARTDBG_CR_SIRLP             0x4
#define BF_UARTDBG_CR_SIRLP(v)          (((v) & 0x1) << 2)
#define BFM_UARTDBG_CR_SIRLP(v)         BM_UARTDBG_CR_SIRLP
#define BF_UARTDBG_CR_SIRLP_V(e)        BF_UARTDBG_CR_SIRLP(BV_UARTDBG_CR_SIRLP__##e)
#define BFM_UARTDBG_CR_SIRLP_V(v)       BM_UARTDBG_CR_SIRLP
#define BP_UARTDBG_CR_SIREN             1
#define BM_UARTDBG_CR_SIREN             0x2
#define BF_UARTDBG_CR_SIREN(v)          (((v) & 0x1) << 1)
#define BFM_UARTDBG_CR_SIREN(v)         BM_UARTDBG_CR_SIREN
#define BF_UARTDBG_CR_SIREN_V(e)        BF_UARTDBG_CR_SIREN(BV_UARTDBG_CR_SIREN__##e)
#define BFM_UARTDBG_CR_SIREN_V(v)       BM_UARTDBG_CR_SIREN
#define BP_UARTDBG_CR_UARTEN            0
#define BM_UARTDBG_CR_UARTEN            0x1
#define BF_UARTDBG_CR_UARTEN(v)         (((v) & 0x1) << 0)
#define BFM_UARTDBG_CR_UARTEN(v)        BM_UARTDBG_CR_UARTEN
#define BF_UARTDBG_CR_UARTEN_V(e)       BF_UARTDBG_CR_UARTEN(BV_UARTDBG_CR_UARTEN__##e)
#define BFM_UARTDBG_CR_UARTEN_V(v)      BM_UARTDBG_CR_UARTEN

#define HW_UARTDBG_IFLS                             HW(UARTDBG_IFLS)
#define HWA_UARTDBG_IFLS                            (0x80070000 + 0x34)
#define HWT_UARTDBG_IFLS                            HWIO_32_RW
#define HWN_UARTDBG_IFLS                            UARTDBG_IFLS
#define HWI_UARTDBG_IFLS                            
#define BP_UARTDBG_IFLS_UNAVAILABLE                 16
#define BM_UARTDBG_IFLS_UNAVAILABLE                 0xffff0000
#define BF_UARTDBG_IFLS_UNAVAILABLE(v)              (((v) & 0xffff) << 16)
#define BFM_UARTDBG_IFLS_UNAVAILABLE(v)             BM_UARTDBG_IFLS_UNAVAILABLE
#define BF_UARTDBG_IFLS_UNAVAILABLE_V(e)            BF_UARTDBG_IFLS_UNAVAILABLE(BV_UARTDBG_IFLS_UNAVAILABLE__##e)
#define BFM_UARTDBG_IFLS_UNAVAILABLE_V(v)           BM_UARTDBG_IFLS_UNAVAILABLE
#define BP_UARTDBG_IFLS_RESERVED                    6
#define BM_UARTDBG_IFLS_RESERVED                    0xffc0
#define BF_UARTDBG_IFLS_RESERVED(v)                 (((v) & 0x3ff) << 6)
#define BFM_UARTDBG_IFLS_RESERVED(v)                BM_UARTDBG_IFLS_RESERVED
#define BF_UARTDBG_IFLS_RESERVED_V(e)               BF_UARTDBG_IFLS_RESERVED(BV_UARTDBG_IFLS_RESERVED__##e)
#define BFM_UARTDBG_IFLS_RESERVED_V(v)              BM_UARTDBG_IFLS_RESERVED
#define BP_UARTDBG_IFLS_RXIFLSEL                    3
#define BM_UARTDBG_IFLS_RXIFLSEL                    0x38
#define BV_UARTDBG_IFLS_RXIFLSEL__NOT_EMPTY         0x0
#define BV_UARTDBG_IFLS_RXIFLSEL__ONE_QUARTER       0x1
#define BV_UARTDBG_IFLS_RXIFLSEL__ONE_HALF          0x2
#define BV_UARTDBG_IFLS_RXIFLSEL__THREE_QUARTERS    0x3
#define BV_UARTDBG_IFLS_RXIFLSEL__SEVEN_EIGHTHS     0x4
#define BV_UARTDBG_IFLS_RXIFLSEL__INVALID5          0x5
#define BV_UARTDBG_IFLS_RXIFLSEL__INVALID6          0x6
#define BV_UARTDBG_IFLS_RXIFLSEL__INVALID7          0x7
#define BF_UARTDBG_IFLS_RXIFLSEL(v)                 (((v) & 0x7) << 3)
#define BFM_UARTDBG_IFLS_RXIFLSEL(v)                BM_UARTDBG_IFLS_RXIFLSEL
#define BF_UARTDBG_IFLS_RXIFLSEL_V(e)               BF_UARTDBG_IFLS_RXIFLSEL(BV_UARTDBG_IFLS_RXIFLSEL__##e)
#define BFM_UARTDBG_IFLS_RXIFLSEL_V(v)              BM_UARTDBG_IFLS_RXIFLSEL
#define BP_UARTDBG_IFLS_TXIFLSEL                    0
#define BM_UARTDBG_IFLS_TXIFLSEL                    0x7
#define BV_UARTDBG_IFLS_TXIFLSEL__EMPTY             0x0
#define BV_UARTDBG_IFLS_TXIFLSEL__ONE_QUARTER       0x1
#define BV_UARTDBG_IFLS_TXIFLSEL__ONE_HALF          0x2
#define BV_UARTDBG_IFLS_TXIFLSEL__THREE_QUARTERS    0x3
#define BV_UARTDBG_IFLS_TXIFLSEL__SEVEN_EIGHTHS     0x4
#define BV_UARTDBG_IFLS_TXIFLSEL__INVALID5          0x5
#define BV_UARTDBG_IFLS_TXIFLSEL__INVALID6          0x6
#define BV_UARTDBG_IFLS_TXIFLSEL__INVALID7          0x7
#define BF_UARTDBG_IFLS_TXIFLSEL(v)                 (((v) & 0x7) << 0)
#define BFM_UARTDBG_IFLS_TXIFLSEL(v)                BM_UARTDBG_IFLS_TXIFLSEL
#define BF_UARTDBG_IFLS_TXIFLSEL_V(e)               BF_UARTDBG_IFLS_TXIFLSEL(BV_UARTDBG_IFLS_TXIFLSEL__##e)
#define BFM_UARTDBG_IFLS_TXIFLSEL_V(v)              BM_UARTDBG_IFLS_TXIFLSEL

#define HW_UARTDBG_IMSC                     HW(UARTDBG_IMSC)
#define HWA_UARTDBG_IMSC                    (0x80070000 + 0x38)
#define HWT_UARTDBG_IMSC                    HWIO_32_RW
#define HWN_UARTDBG_IMSC                    UARTDBG_IMSC
#define HWI_UARTDBG_IMSC                    
#define BP_UARTDBG_IMSC_UNAVAILABLE         16
#define BM_UARTDBG_IMSC_UNAVAILABLE         0xffff0000
#define BF_UARTDBG_IMSC_UNAVAILABLE(v)      (((v) & 0xffff) << 16)
#define BFM_UARTDBG_IMSC_UNAVAILABLE(v)     BM_UARTDBG_IMSC_UNAVAILABLE
#define BF_UARTDBG_IMSC_UNAVAILABLE_V(e)    BF_UARTDBG_IMSC_UNAVAILABLE(BV_UARTDBG_IMSC_UNAVAILABLE__##e)
#define BFM_UARTDBG_IMSC_UNAVAILABLE_V(v)   BM_UARTDBG_IMSC_UNAVAILABLE
#define BP_UARTDBG_IMSC_RESERVED            11
#define BM_UARTDBG_IMSC_RESERVED            0xf800
#define BF_UARTDBG_IMSC_RESERVED(v)         (((v) & 0x1f) << 11)
#define BFM_UARTDBG_IMSC_RESERVED(v)        BM_UARTDBG_IMSC_RESERVED
#define BF_UARTDBG_IMSC_RESERVED_V(e)       BF_UARTDBG_IMSC_RESERVED(BV_UARTDBG_IMSC_RESERVED__##e)
#define BFM_UARTDBG_IMSC_RESERVED_V(v)      BM_UARTDBG_IMSC_RESERVED
#define BP_UARTDBG_IMSC_OEIM                10
#define BM_UARTDBG_IMSC_OEIM                0x400
#define BF_UARTDBG_IMSC_OEIM(v)             (((v) & 0x1) << 10)
#define BFM_UARTDBG_IMSC_OEIM(v)            BM_UARTDBG_IMSC_OEIM
#define BF_UARTDBG_IMSC_OEIM_V(e)           BF_UARTDBG_IMSC_OEIM(BV_UARTDBG_IMSC_OEIM__##e)
#define BFM_UARTDBG_IMSC_OEIM_V(v)          BM_UARTDBG_IMSC_OEIM
#define BP_UARTDBG_IMSC_BEIM                9
#define BM_UARTDBG_IMSC_BEIM                0x200
#define BF_UARTDBG_IMSC_BEIM(v)             (((v) & 0x1) << 9)
#define BFM_UARTDBG_IMSC_BEIM(v)            BM_UARTDBG_IMSC_BEIM
#define BF_UARTDBG_IMSC_BEIM_V(e)           BF_UARTDBG_IMSC_BEIM(BV_UARTDBG_IMSC_BEIM__##e)
#define BFM_UARTDBG_IMSC_BEIM_V(v)          BM_UARTDBG_IMSC_BEIM
#define BP_UARTDBG_IMSC_PEIM                8
#define BM_UARTDBG_IMSC_PEIM                0x100
#define BF_UARTDBG_IMSC_PEIM(v)             (((v) & 0x1) << 8)
#define BFM_UARTDBG_IMSC_PEIM(v)            BM_UARTDBG_IMSC_PEIM
#define BF_UARTDBG_IMSC_PEIM_V(e)           BF_UARTDBG_IMSC_PEIM(BV_UARTDBG_IMSC_PEIM__##e)
#define BFM_UARTDBG_IMSC_PEIM_V(v)          BM_UARTDBG_IMSC_PEIM
#define BP_UARTDBG_IMSC_FEIM                7
#define BM_UARTDBG_IMSC_FEIM                0x80
#define BF_UARTDBG_IMSC_FEIM(v)             (((v) & 0x1) << 7)
#define BFM_UARTDBG_IMSC_FEIM(v)            BM_UARTDBG_IMSC_FEIM
#define BF_UARTDBG_IMSC_FEIM_V(e)           BF_UARTDBG_IMSC_FEIM(BV_UARTDBG_IMSC_FEIM__##e)
#define BFM_UARTDBG_IMSC_FEIM_V(v)          BM_UARTDBG_IMSC_FEIM
#define BP_UARTDBG_IMSC_RTIM                6
#define BM_UARTDBG_IMSC_RTIM                0x40
#define BF_UARTDBG_IMSC_RTIM(v)             (((v) & 0x1) << 6)
#define BFM_UARTDBG_IMSC_RTIM(v)            BM_UARTDBG_IMSC_RTIM
#define BF_UARTDBG_IMSC_RTIM_V(e)           BF_UARTDBG_IMSC_RTIM(BV_UARTDBG_IMSC_RTIM__##e)
#define BFM_UARTDBG_IMSC_RTIM_V(v)          BM_UARTDBG_IMSC_RTIM
#define BP_UARTDBG_IMSC_TXIM                5
#define BM_UARTDBG_IMSC_TXIM                0x20
#define BF_UARTDBG_IMSC_TXIM(v)             (((v) & 0x1) << 5)
#define BFM_UARTDBG_IMSC_TXIM(v)            BM_UARTDBG_IMSC_TXIM
#define BF_UARTDBG_IMSC_TXIM_V(e)           BF_UARTDBG_IMSC_TXIM(BV_UARTDBG_IMSC_TXIM__##e)
#define BFM_UARTDBG_IMSC_TXIM_V(v)          BM_UARTDBG_IMSC_TXIM
#define BP_UARTDBG_IMSC_RXIM                4
#define BM_UARTDBG_IMSC_RXIM                0x10
#define BF_UARTDBG_IMSC_RXIM(v)             (((v) & 0x1) << 4)
#define BFM_UARTDBG_IMSC_RXIM(v)            BM_UARTDBG_IMSC_RXIM
#define BF_UARTDBG_IMSC_RXIM_V(e)           BF_UARTDBG_IMSC_RXIM(BV_UARTDBG_IMSC_RXIM__##e)
#define BFM_UARTDBG_IMSC_RXIM_V(v)          BM_UARTDBG_IMSC_RXIM
#define BP_UARTDBG_IMSC_DSRMIM              3
#define BM_UARTDBG_IMSC_DSRMIM              0x8
#define BF_UARTDBG_IMSC_DSRMIM(v)           (((v) & 0x1) << 3)
#define BFM_UARTDBG_IMSC_DSRMIM(v)          BM_UARTDBG_IMSC_DSRMIM
#define BF_UARTDBG_IMSC_DSRMIM_V(e)         BF_UARTDBG_IMSC_DSRMIM(BV_UARTDBG_IMSC_DSRMIM__##e)
#define BFM_UARTDBG_IMSC_DSRMIM_V(v)        BM_UARTDBG_IMSC_DSRMIM
#define BP_UARTDBG_IMSC_DCDMIM              2
#define BM_UARTDBG_IMSC_DCDMIM              0x4
#define BF_UARTDBG_IMSC_DCDMIM(v)           (((v) & 0x1) << 2)
#define BFM_UARTDBG_IMSC_DCDMIM(v)          BM_UARTDBG_IMSC_DCDMIM
#define BF_UARTDBG_IMSC_DCDMIM_V(e)         BF_UARTDBG_IMSC_DCDMIM(BV_UARTDBG_IMSC_DCDMIM__##e)
#define BFM_UARTDBG_IMSC_DCDMIM_V(v)        BM_UARTDBG_IMSC_DCDMIM
#define BP_UARTDBG_IMSC_CTSMIM              1
#define BM_UARTDBG_IMSC_CTSMIM              0x2
#define BF_UARTDBG_IMSC_CTSMIM(v)           (((v) & 0x1) << 1)
#define BFM_UARTDBG_IMSC_CTSMIM(v)          BM_UARTDBG_IMSC_CTSMIM
#define BF_UARTDBG_IMSC_CTSMIM_V(e)         BF_UARTDBG_IMSC_CTSMIM(BV_UARTDBG_IMSC_CTSMIM__##e)
#define BFM_UARTDBG_IMSC_CTSMIM_V(v)        BM_UARTDBG_IMSC_CTSMIM
#define BP_UARTDBG_IMSC_RIMIM               0
#define BM_UARTDBG_IMSC_RIMIM               0x1
#define BF_UARTDBG_IMSC_RIMIM(v)            (((v) & 0x1) << 0)
#define BFM_UARTDBG_IMSC_RIMIM(v)           BM_UARTDBG_IMSC_RIMIM
#define BF_UARTDBG_IMSC_RIMIM_V(e)          BF_UARTDBG_IMSC_RIMIM(BV_UARTDBG_IMSC_RIMIM__##e)
#define BFM_UARTDBG_IMSC_RIMIM_V(v)         BM_UARTDBG_IMSC_RIMIM

#define HW_UARTDBG_RIS                      HW(UARTDBG_RIS)
#define HWA_UARTDBG_RIS                     (0x80070000 + 0x3c)
#define HWT_UARTDBG_RIS                     HWIO_32_RW
#define HWN_UARTDBG_RIS                     UARTDBG_RIS
#define HWI_UARTDBG_RIS                     
#define BP_UARTDBG_RIS_UNAVAILABLE          16
#define BM_UARTDBG_RIS_UNAVAILABLE          0xffff0000
#define BF_UARTDBG_RIS_UNAVAILABLE(v)       (((v) & 0xffff) << 16)
#define BFM_UARTDBG_RIS_UNAVAILABLE(v)      BM_UARTDBG_RIS_UNAVAILABLE
#define BF_UARTDBG_RIS_UNAVAILABLE_V(e)     BF_UARTDBG_RIS_UNAVAILABLE(BV_UARTDBG_RIS_UNAVAILABLE__##e)
#define BFM_UARTDBG_RIS_UNAVAILABLE_V(v)    BM_UARTDBG_RIS_UNAVAILABLE
#define BP_UARTDBG_RIS_RESERVED             11
#define BM_UARTDBG_RIS_RESERVED             0xf800
#define BF_UARTDBG_RIS_RESERVED(v)          (((v) & 0x1f) << 11)
#define BFM_UARTDBG_RIS_RESERVED(v)         BM_UARTDBG_RIS_RESERVED
#define BF_UARTDBG_RIS_RESERVED_V(e)        BF_UARTDBG_RIS_RESERVED(BV_UARTDBG_RIS_RESERVED__##e)
#define BFM_UARTDBG_RIS_RESERVED_V(v)       BM_UARTDBG_RIS_RESERVED
#define BP_UARTDBG_RIS_OERIS                10
#define BM_UARTDBG_RIS_OERIS                0x400
#define BF_UARTDBG_RIS_OERIS(v)             (((v) & 0x1) << 10)
#define BFM_UARTDBG_RIS_OERIS(v)            BM_UARTDBG_RIS_OERIS
#define BF_UARTDBG_RIS_OERIS_V(e)           BF_UARTDBG_RIS_OERIS(BV_UARTDBG_RIS_OERIS__##e)
#define BFM_UARTDBG_RIS_OERIS_V(v)          BM_UARTDBG_RIS_OERIS
#define BP_UARTDBG_RIS_BERIS                9
#define BM_UARTDBG_RIS_BERIS                0x200
#define BF_UARTDBG_RIS_BERIS(v)             (((v) & 0x1) << 9)
#define BFM_UARTDBG_RIS_BERIS(v)            BM_UARTDBG_RIS_BERIS
#define BF_UARTDBG_RIS_BERIS_V(e)           BF_UARTDBG_RIS_BERIS(BV_UARTDBG_RIS_BERIS__##e)
#define BFM_UARTDBG_RIS_BERIS_V(v)          BM_UARTDBG_RIS_BERIS
#define BP_UARTDBG_RIS_PERIS                8
#define BM_UARTDBG_RIS_PERIS                0x100
#define BF_UARTDBG_RIS_PERIS(v)             (((v) & 0x1) << 8)
#define BFM_UARTDBG_RIS_PERIS(v)            BM_UARTDBG_RIS_PERIS
#define BF_UARTDBG_RIS_PERIS_V(e)           BF_UARTDBG_RIS_PERIS(BV_UARTDBG_RIS_PERIS__##e)
#define BFM_UARTDBG_RIS_PERIS_V(v)          BM_UARTDBG_RIS_PERIS
#define BP_UARTDBG_RIS_FERIS                7
#define BM_UARTDBG_RIS_FERIS                0x80
#define BF_UARTDBG_RIS_FERIS(v)             (((v) & 0x1) << 7)
#define BFM_UARTDBG_RIS_FERIS(v)            BM_UARTDBG_RIS_FERIS
#define BF_UARTDBG_RIS_FERIS_V(e)           BF_UARTDBG_RIS_FERIS(BV_UARTDBG_RIS_FERIS__##e)
#define BFM_UARTDBG_RIS_FERIS_V(v)          BM_UARTDBG_RIS_FERIS
#define BP_UARTDBG_RIS_RTRIS                6
#define BM_UARTDBG_RIS_RTRIS                0x40
#define BF_UARTDBG_RIS_RTRIS(v)             (((v) & 0x1) << 6)
#define BFM_UARTDBG_RIS_RTRIS(v)            BM_UARTDBG_RIS_RTRIS
#define BF_UARTDBG_RIS_RTRIS_V(e)           BF_UARTDBG_RIS_RTRIS(BV_UARTDBG_RIS_RTRIS__##e)
#define BFM_UARTDBG_RIS_RTRIS_V(v)          BM_UARTDBG_RIS_RTRIS
#define BP_UARTDBG_RIS_TXRIS                5
#define BM_UARTDBG_RIS_TXRIS                0x20
#define BF_UARTDBG_RIS_TXRIS(v)             (((v) & 0x1) << 5)
#define BFM_UARTDBG_RIS_TXRIS(v)            BM_UARTDBG_RIS_TXRIS
#define BF_UARTDBG_RIS_TXRIS_V(e)           BF_UARTDBG_RIS_TXRIS(BV_UARTDBG_RIS_TXRIS__##e)
#define BFM_UARTDBG_RIS_TXRIS_V(v)          BM_UARTDBG_RIS_TXRIS
#define BP_UARTDBG_RIS_RXRIS                4
#define BM_UARTDBG_RIS_RXRIS                0x10
#define BF_UARTDBG_RIS_RXRIS(v)             (((v) & 0x1) << 4)
#define BFM_UARTDBG_RIS_RXRIS(v)            BM_UARTDBG_RIS_RXRIS
#define BF_UARTDBG_RIS_RXRIS_V(e)           BF_UARTDBG_RIS_RXRIS(BV_UARTDBG_RIS_RXRIS__##e)
#define BFM_UARTDBG_RIS_RXRIS_V(v)          BM_UARTDBG_RIS_RXRIS
#define BP_UARTDBG_RIS_DSRRMIS              3
#define BM_UARTDBG_RIS_DSRRMIS              0x8
#define BF_UARTDBG_RIS_DSRRMIS(v)           (((v) & 0x1) << 3)
#define BFM_UARTDBG_RIS_DSRRMIS(v)          BM_UARTDBG_RIS_DSRRMIS
#define BF_UARTDBG_RIS_DSRRMIS_V(e)         BF_UARTDBG_RIS_DSRRMIS(BV_UARTDBG_RIS_DSRRMIS__##e)
#define BFM_UARTDBG_RIS_DSRRMIS_V(v)        BM_UARTDBG_RIS_DSRRMIS
#define BP_UARTDBG_RIS_DCDRMIS              2
#define BM_UARTDBG_RIS_DCDRMIS              0x4
#define BF_UARTDBG_RIS_DCDRMIS(v)           (((v) & 0x1) << 2)
#define BFM_UARTDBG_RIS_DCDRMIS(v)          BM_UARTDBG_RIS_DCDRMIS
#define BF_UARTDBG_RIS_DCDRMIS_V(e)         BF_UARTDBG_RIS_DCDRMIS(BV_UARTDBG_RIS_DCDRMIS__##e)
#define BFM_UARTDBG_RIS_DCDRMIS_V(v)        BM_UARTDBG_RIS_DCDRMIS
#define BP_UARTDBG_RIS_CTSRMIS              1
#define BM_UARTDBG_RIS_CTSRMIS              0x2
#define BF_UARTDBG_RIS_CTSRMIS(v)           (((v) & 0x1) << 1)
#define BFM_UARTDBG_RIS_CTSRMIS(v)          BM_UARTDBG_RIS_CTSRMIS
#define BF_UARTDBG_RIS_CTSRMIS_V(e)         BF_UARTDBG_RIS_CTSRMIS(BV_UARTDBG_RIS_CTSRMIS__##e)
#define BFM_UARTDBG_RIS_CTSRMIS_V(v)        BM_UARTDBG_RIS_CTSRMIS
#define BP_UARTDBG_RIS_RIRMIS               0
#define BM_UARTDBG_RIS_RIRMIS               0x1
#define BF_UARTDBG_RIS_RIRMIS(v)            (((v) & 0x1) << 0)
#define BFM_UARTDBG_RIS_RIRMIS(v)           BM_UARTDBG_RIS_RIRMIS
#define BF_UARTDBG_RIS_RIRMIS_V(e)          BF_UARTDBG_RIS_RIRMIS(BV_UARTDBG_RIS_RIRMIS__##e)
#define BFM_UARTDBG_RIS_RIRMIS_V(v)         BM_UARTDBG_RIS_RIRMIS

#define HW_UARTDBG_MIS                      HW(UARTDBG_MIS)
#define HWA_UARTDBG_MIS                     (0x80070000 + 0x40)
#define HWT_UARTDBG_MIS                     HWIO_32_RW
#define HWN_UARTDBG_MIS                     UARTDBG_MIS
#define HWI_UARTDBG_MIS                     
#define BP_UARTDBG_MIS_UNAVAILABLE          16
#define BM_UARTDBG_MIS_UNAVAILABLE          0xffff0000
#define BF_UARTDBG_MIS_UNAVAILABLE(v)       (((v) & 0xffff) << 16)
#define BFM_UARTDBG_MIS_UNAVAILABLE(v)      BM_UARTDBG_MIS_UNAVAILABLE
#define BF_UARTDBG_MIS_UNAVAILABLE_V(e)     BF_UARTDBG_MIS_UNAVAILABLE(BV_UARTDBG_MIS_UNAVAILABLE__##e)
#define BFM_UARTDBG_MIS_UNAVAILABLE_V(v)    BM_UARTDBG_MIS_UNAVAILABLE
#define BP_UARTDBG_MIS_RESERVED             11
#define BM_UARTDBG_MIS_RESERVED             0xf800
#define BF_UARTDBG_MIS_RESERVED(v)          (((v) & 0x1f) << 11)
#define BFM_UARTDBG_MIS_RESERVED(v)         BM_UARTDBG_MIS_RESERVED
#define BF_UARTDBG_MIS_RESERVED_V(e)        BF_UARTDBG_MIS_RESERVED(BV_UARTDBG_MIS_RESERVED__##e)
#define BFM_UARTDBG_MIS_RESERVED_V(v)       BM_UARTDBG_MIS_RESERVED
#define BP_UARTDBG_MIS_OEMIS                10
#define BM_UARTDBG_MIS_OEMIS                0x400
#define BF_UARTDBG_MIS_OEMIS(v)             (((v) & 0x1) << 10)
#define BFM_UARTDBG_MIS_OEMIS(v)            BM_UARTDBG_MIS_OEMIS
#define BF_UARTDBG_MIS_OEMIS_V(e)           BF_UARTDBG_MIS_OEMIS(BV_UARTDBG_MIS_OEMIS__##e)
#define BFM_UARTDBG_MIS_OEMIS_V(v)          BM_UARTDBG_MIS_OEMIS
#define BP_UARTDBG_MIS_BEMIS                9
#define BM_UARTDBG_MIS_BEMIS                0x200
#define BF_UARTDBG_MIS_BEMIS(v)             (((v) & 0x1) << 9)
#define BFM_UARTDBG_MIS_BEMIS(v)            BM_UARTDBG_MIS_BEMIS
#define BF_UARTDBG_MIS_BEMIS_V(e)           BF_UARTDBG_MIS_BEMIS(BV_UARTDBG_MIS_BEMIS__##e)
#define BFM_UARTDBG_MIS_BEMIS_V(v)          BM_UARTDBG_MIS_BEMIS
#define BP_UARTDBG_MIS_PEMIS                8
#define BM_UARTDBG_MIS_PEMIS                0x100
#define BF_UARTDBG_MIS_PEMIS(v)             (((v) & 0x1) << 8)
#define BFM_UARTDBG_MIS_PEMIS(v)            BM_UARTDBG_MIS_PEMIS
#define BF_UARTDBG_MIS_PEMIS_V(e)           BF_UARTDBG_MIS_PEMIS(BV_UARTDBG_MIS_PEMIS__##e)
#define BFM_UARTDBG_MIS_PEMIS_V(v)          BM_UARTDBG_MIS_PEMIS
#define BP_UARTDBG_MIS_FEMIS                7
#define BM_UARTDBG_MIS_FEMIS                0x80
#define BF_UARTDBG_MIS_FEMIS(v)             (((v) & 0x1) << 7)
#define BFM_UARTDBG_MIS_FEMIS(v)            BM_UARTDBG_MIS_FEMIS
#define BF_UARTDBG_MIS_FEMIS_V(e)           BF_UARTDBG_MIS_FEMIS(BV_UARTDBG_MIS_FEMIS__##e)
#define BFM_UARTDBG_MIS_FEMIS_V(v)          BM_UARTDBG_MIS_FEMIS
#define BP_UARTDBG_MIS_RTMIS                6
#define BM_UARTDBG_MIS_RTMIS                0x40
#define BF_UARTDBG_MIS_RTMIS(v)             (((v) & 0x1) << 6)
#define BFM_UARTDBG_MIS_RTMIS(v)            BM_UARTDBG_MIS_RTMIS
#define BF_UARTDBG_MIS_RTMIS_V(e)           BF_UARTDBG_MIS_RTMIS(BV_UARTDBG_MIS_RTMIS__##e)
#define BFM_UARTDBG_MIS_RTMIS_V(v)          BM_UARTDBG_MIS_RTMIS
#define BP_UARTDBG_MIS_TXMIS                5
#define BM_UARTDBG_MIS_TXMIS                0x20
#define BF_UARTDBG_MIS_TXMIS(v)             (((v) & 0x1) << 5)
#define BFM_UARTDBG_MIS_TXMIS(v)            BM_UARTDBG_MIS_TXMIS
#define BF_UARTDBG_MIS_TXMIS_V(e)           BF_UARTDBG_MIS_TXMIS(BV_UARTDBG_MIS_TXMIS__##e)
#define BFM_UARTDBG_MIS_TXMIS_V(v)          BM_UARTDBG_MIS_TXMIS
#define BP_UARTDBG_MIS_RXMIS                4
#define BM_UARTDBG_MIS_RXMIS                0x10
#define BF_UARTDBG_MIS_RXMIS(v)             (((v) & 0x1) << 4)
#define BFM_UARTDBG_MIS_RXMIS(v)            BM_UARTDBG_MIS_RXMIS
#define BF_UARTDBG_MIS_RXMIS_V(e)           BF_UARTDBG_MIS_RXMIS(BV_UARTDBG_MIS_RXMIS__##e)
#define BFM_UARTDBG_MIS_RXMIS_V(v)          BM_UARTDBG_MIS_RXMIS
#define BP_UARTDBG_MIS_DSRMMIS              3
#define BM_UARTDBG_MIS_DSRMMIS              0x8
#define BF_UARTDBG_MIS_DSRMMIS(v)           (((v) & 0x1) << 3)
#define BFM_UARTDBG_MIS_DSRMMIS(v)          BM_UARTDBG_MIS_DSRMMIS
#define BF_UARTDBG_MIS_DSRMMIS_V(e)         BF_UARTDBG_MIS_DSRMMIS(BV_UARTDBG_MIS_DSRMMIS__##e)
#define BFM_UARTDBG_MIS_DSRMMIS_V(v)        BM_UARTDBG_MIS_DSRMMIS
#define BP_UARTDBG_MIS_DCDMMIS              2
#define BM_UARTDBG_MIS_DCDMMIS              0x4
#define BF_UARTDBG_MIS_DCDMMIS(v)           (((v) & 0x1) << 2)
#define BFM_UARTDBG_MIS_DCDMMIS(v)          BM_UARTDBG_MIS_DCDMMIS
#define BF_UARTDBG_MIS_DCDMMIS_V(e)         BF_UARTDBG_MIS_DCDMMIS(BV_UARTDBG_MIS_DCDMMIS__##e)
#define BFM_UARTDBG_MIS_DCDMMIS_V(v)        BM_UARTDBG_MIS_DCDMMIS
#define BP_UARTDBG_MIS_CTSMMIS              1
#define BM_UARTDBG_MIS_CTSMMIS              0x2
#define BF_UARTDBG_MIS_CTSMMIS(v)           (((v) & 0x1) << 1)
#define BFM_UARTDBG_MIS_CTSMMIS(v)          BM_UARTDBG_MIS_CTSMMIS
#define BF_UARTDBG_MIS_CTSMMIS_V(e)         BF_UARTDBG_MIS_CTSMMIS(BV_UARTDBG_MIS_CTSMMIS__##e)
#define BFM_UARTDBG_MIS_CTSMMIS_V(v)        BM_UARTDBG_MIS_CTSMMIS
#define BP_UARTDBG_MIS_RIMMIS               0
#define BM_UARTDBG_MIS_RIMMIS               0x1
#define BF_UARTDBG_MIS_RIMMIS(v)            (((v) & 0x1) << 0)
#define BFM_UARTDBG_MIS_RIMMIS(v)           BM_UARTDBG_MIS_RIMMIS
#define BF_UARTDBG_MIS_RIMMIS_V(e)          BF_UARTDBG_MIS_RIMMIS(BV_UARTDBG_MIS_RIMMIS__##e)
#define BFM_UARTDBG_MIS_RIMMIS_V(v)         BM_UARTDBG_MIS_RIMMIS

#define HW_UARTDBG_ICR                      HW(UARTDBG_ICR)
#define HWA_UARTDBG_ICR                     (0x80070000 + 0x44)
#define HWT_UARTDBG_ICR                     HWIO_32_RW
#define HWN_UARTDBG_ICR                     UARTDBG_ICR
#define HWI_UARTDBG_ICR                     
#define BP_UARTDBG_ICR_UNAVAILABLE          16
#define BM_UARTDBG_ICR_UNAVAILABLE          0xffff0000
#define BF_UARTDBG_ICR_UNAVAILABLE(v)       (((v) & 0xffff) << 16)
#define BFM_UARTDBG_ICR_UNAVAILABLE(v)      BM_UARTDBG_ICR_UNAVAILABLE
#define BF_UARTDBG_ICR_UNAVAILABLE_V(e)     BF_UARTDBG_ICR_UNAVAILABLE(BV_UARTDBG_ICR_UNAVAILABLE__##e)
#define BFM_UARTDBG_ICR_UNAVAILABLE_V(v)    BM_UARTDBG_ICR_UNAVAILABLE
#define BP_UARTDBG_ICR_RESERVED             11
#define BM_UARTDBG_ICR_RESERVED             0xf800
#define BF_UARTDBG_ICR_RESERVED(v)          (((v) & 0x1f) << 11)
#define BFM_UARTDBG_ICR_RESERVED(v)         BM_UARTDBG_ICR_RESERVED
#define BF_UARTDBG_ICR_RESERVED_V(e)        BF_UARTDBG_ICR_RESERVED(BV_UARTDBG_ICR_RESERVED__##e)
#define BFM_UARTDBG_ICR_RESERVED_V(v)       BM_UARTDBG_ICR_RESERVED
#define BP_UARTDBG_ICR_OEIC                 10
#define BM_UARTDBG_ICR_OEIC                 0x400
#define BF_UARTDBG_ICR_OEIC(v)              (((v) & 0x1) << 10)
#define BFM_UARTDBG_ICR_OEIC(v)             BM_UARTDBG_ICR_OEIC
#define BF_UARTDBG_ICR_OEIC_V(e)            BF_UARTDBG_ICR_OEIC(BV_UARTDBG_ICR_OEIC__##e)
#define BFM_UARTDBG_ICR_OEIC_V(v)           BM_UARTDBG_ICR_OEIC
#define BP_UARTDBG_ICR_BEIC                 9
#define BM_UARTDBG_ICR_BEIC                 0x200
#define BF_UARTDBG_ICR_BEIC(v)              (((v) & 0x1) << 9)
#define BFM_UARTDBG_ICR_BEIC(v)             BM_UARTDBG_ICR_BEIC
#define BF_UARTDBG_ICR_BEIC_V(e)            BF_UARTDBG_ICR_BEIC(BV_UARTDBG_ICR_BEIC__##e)
#define BFM_UARTDBG_ICR_BEIC_V(v)           BM_UARTDBG_ICR_BEIC
#define BP_UARTDBG_ICR_PEIC                 8
#define BM_UARTDBG_ICR_PEIC                 0x100
#define BF_UARTDBG_ICR_PEIC(v)              (((v) & 0x1) << 8)
#define BFM_UARTDBG_ICR_PEIC(v)             BM_UARTDBG_ICR_PEIC
#define BF_UARTDBG_ICR_PEIC_V(e)            BF_UARTDBG_ICR_PEIC(BV_UARTDBG_ICR_PEIC__##e)
#define BFM_UARTDBG_ICR_PEIC_V(v)           BM_UARTDBG_ICR_PEIC
#define BP_UARTDBG_ICR_FEIC                 7
#define BM_UARTDBG_ICR_FEIC                 0x80
#define BF_UARTDBG_ICR_FEIC(v)              (((v) & 0x1) << 7)
#define BFM_UARTDBG_ICR_FEIC(v)             BM_UARTDBG_ICR_FEIC
#define BF_UARTDBG_ICR_FEIC_V(e)            BF_UARTDBG_ICR_FEIC(BV_UARTDBG_ICR_FEIC__##e)
#define BFM_UARTDBG_ICR_FEIC_V(v)           BM_UARTDBG_ICR_FEIC
#define BP_UARTDBG_ICR_RTIC                 6
#define BM_UARTDBG_ICR_RTIC                 0x40
#define BF_UARTDBG_ICR_RTIC(v)              (((v) & 0x1) << 6)
#define BFM_UARTDBG_ICR_RTIC(v)             BM_UARTDBG_ICR_RTIC
#define BF_UARTDBG_ICR_RTIC_V(e)            BF_UARTDBG_ICR_RTIC(BV_UARTDBG_ICR_RTIC__##e)
#define BFM_UARTDBG_ICR_RTIC_V(v)           BM_UARTDBG_ICR_RTIC
#define BP_UARTDBG_ICR_TXIC                 5
#define BM_UARTDBG_ICR_TXIC                 0x20
#define BF_UARTDBG_ICR_TXIC(v)              (((v) & 0x1) << 5)
#define BFM_UARTDBG_ICR_TXIC(v)             BM_UARTDBG_ICR_TXIC
#define BF_UARTDBG_ICR_TXIC_V(e)            BF_UARTDBG_ICR_TXIC(BV_UARTDBG_ICR_TXIC__##e)
#define BFM_UARTDBG_ICR_TXIC_V(v)           BM_UARTDBG_ICR_TXIC
#define BP_UARTDBG_ICR_RXIC                 4
#define BM_UARTDBG_ICR_RXIC                 0x10
#define BF_UARTDBG_ICR_RXIC(v)              (((v) & 0x1) << 4)
#define BFM_UARTDBG_ICR_RXIC(v)             BM_UARTDBG_ICR_RXIC
#define BF_UARTDBG_ICR_RXIC_V(e)            BF_UARTDBG_ICR_RXIC(BV_UARTDBG_ICR_RXIC__##e)
#define BFM_UARTDBG_ICR_RXIC_V(v)           BM_UARTDBG_ICR_RXIC
#define BP_UARTDBG_ICR_DSRMIC               3
#define BM_UARTDBG_ICR_DSRMIC               0x8
#define BF_UARTDBG_ICR_DSRMIC(v)            (((v) & 0x1) << 3)
#define BFM_UARTDBG_ICR_DSRMIC(v)           BM_UARTDBG_ICR_DSRMIC
#define BF_UARTDBG_ICR_DSRMIC_V(e)          BF_UARTDBG_ICR_DSRMIC(BV_UARTDBG_ICR_DSRMIC__##e)
#define BFM_UARTDBG_ICR_DSRMIC_V(v)         BM_UARTDBG_ICR_DSRMIC
#define BP_UARTDBG_ICR_DCDMIC               2
#define BM_UARTDBG_ICR_DCDMIC               0x4
#define BF_UARTDBG_ICR_DCDMIC(v)            (((v) & 0x1) << 2)
#define BFM_UARTDBG_ICR_DCDMIC(v)           BM_UARTDBG_ICR_DCDMIC
#define BF_UARTDBG_ICR_DCDMIC_V(e)          BF_UARTDBG_ICR_DCDMIC(BV_UARTDBG_ICR_DCDMIC__##e)
#define BFM_UARTDBG_ICR_DCDMIC_V(v)         BM_UARTDBG_ICR_DCDMIC
#define BP_UARTDBG_ICR_CTSMIC               1
#define BM_UARTDBG_ICR_CTSMIC               0x2
#define BF_UARTDBG_ICR_CTSMIC(v)            (((v) & 0x1) << 1)
#define BFM_UARTDBG_ICR_CTSMIC(v)           BM_UARTDBG_ICR_CTSMIC
#define BF_UARTDBG_ICR_CTSMIC_V(e)          BF_UARTDBG_ICR_CTSMIC(BV_UARTDBG_ICR_CTSMIC__##e)
#define BFM_UARTDBG_ICR_CTSMIC_V(v)         BM_UARTDBG_ICR_CTSMIC
#define BP_UARTDBG_ICR_RIMIC                0
#define BM_UARTDBG_ICR_RIMIC                0x1
#define BF_UARTDBG_ICR_RIMIC(v)             (((v) & 0x1) << 0)
#define BFM_UARTDBG_ICR_RIMIC(v)            BM_UARTDBG_ICR_RIMIC
#define BF_UARTDBG_ICR_RIMIC_V(e)           BF_UARTDBG_ICR_RIMIC(BV_UARTDBG_ICR_RIMIC__##e)
#define BFM_UARTDBG_ICR_RIMIC_V(v)          BM_UARTDBG_ICR_RIMIC

#define HW_UARTDBG_DMACR                    HW(UARTDBG_DMACR)
#define HWA_UARTDBG_DMACR                   (0x80070000 + 0x48)
#define HWT_UARTDBG_DMACR                   HWIO_32_RW
#define HWN_UARTDBG_DMACR                   UARTDBG_DMACR
#define HWI_UARTDBG_DMACR                   
#define BP_UARTDBG_DMACR_UNAVAILABLE        16
#define BM_UARTDBG_DMACR_UNAVAILABLE        0xffff0000
#define BF_UARTDBG_DMACR_UNAVAILABLE(v)     (((v) & 0xffff) << 16)
#define BFM_UARTDBG_DMACR_UNAVAILABLE(v)    BM_UARTDBG_DMACR_UNAVAILABLE
#define BF_UARTDBG_DMACR_UNAVAILABLE_V(e)   BF_UARTDBG_DMACR_UNAVAILABLE(BV_UARTDBG_DMACR_UNAVAILABLE__##e)
#define BFM_UARTDBG_DMACR_UNAVAILABLE_V(v)  BM_UARTDBG_DMACR_UNAVAILABLE
#define BP_UARTDBG_DMACR_RESERVED           3
#define BM_UARTDBG_DMACR_RESERVED           0xfff8
#define BF_UARTDBG_DMACR_RESERVED(v)        (((v) & 0x1fff) << 3)
#define BFM_UARTDBG_DMACR_RESERVED(v)       BM_UARTDBG_DMACR_RESERVED
#define BF_UARTDBG_DMACR_RESERVED_V(e)      BF_UARTDBG_DMACR_RESERVED(BV_UARTDBG_DMACR_RESERVED__##e)
#define BFM_UARTDBG_DMACR_RESERVED_V(v)     BM_UARTDBG_DMACR_RESERVED
#define BP_UARTDBG_DMACR_DMAONERR           2
#define BM_UARTDBG_DMACR_DMAONERR           0x4
#define BF_UARTDBG_DMACR_DMAONERR(v)        (((v) & 0x1) << 2)
#define BFM_UARTDBG_DMACR_DMAONERR(v)       BM_UARTDBG_DMACR_DMAONERR
#define BF_UARTDBG_DMACR_DMAONERR_V(e)      BF_UARTDBG_DMACR_DMAONERR(BV_UARTDBG_DMACR_DMAONERR__##e)
#define BFM_UARTDBG_DMACR_DMAONERR_V(v)     BM_UARTDBG_DMACR_DMAONERR
#define BP_UARTDBG_DMACR_TXDMAE             1
#define BM_UARTDBG_DMACR_TXDMAE             0x2
#define BF_UARTDBG_DMACR_TXDMAE(v)          (((v) & 0x1) << 1)
#define BFM_UARTDBG_DMACR_TXDMAE(v)         BM_UARTDBG_DMACR_TXDMAE
#define BF_UARTDBG_DMACR_TXDMAE_V(e)        BF_UARTDBG_DMACR_TXDMAE(BV_UARTDBG_DMACR_TXDMAE__##e)
#define BFM_UARTDBG_DMACR_TXDMAE_V(v)       BM_UARTDBG_DMACR_TXDMAE
#define BP_UARTDBG_DMACR_RXDMAE             0
#define BM_UARTDBG_DMACR_RXDMAE             0x1
#define BF_UARTDBG_DMACR_RXDMAE(v)          (((v) & 0x1) << 0)
#define BFM_UARTDBG_DMACR_RXDMAE(v)         BM_UARTDBG_DMACR_RXDMAE
#define BF_UARTDBG_DMACR_RXDMAE_V(e)        BF_UARTDBG_DMACR_RXDMAE(BV_UARTDBG_DMACR_RXDMAE__##e)
#define BFM_UARTDBG_DMACR_RXDMAE_V(v)       BM_UARTDBG_DMACR_RXDMAE

#endif /* __HEADERGEN_IMX233_UARTDBG_H__*/
