/***************************************************************************
 *             __________               __   ___.
 *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
 *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
 *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
 *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
 *                     \/            \/     \/    \/            \/
 * This file was automatically generated by headergen, DO NOT EDIT it.
 * headergen version: 3.0.0
 * stmp3600 version: 2.4.0
 * stmp3600 authors: Amaury Pouly
 *
 * Copyright (C) 2015 by the authors
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
 * KIND, either express or implied.
 *
 ****************************************************************************/
#ifndef __HEADERGEN_STMP3600_ARC_H__
#define __HEADERGEN_STMP3600_ARC_H__

#define HW_ARC_BASE     HW(ARC_BASE)
#define HWA_ARC_BASE    (0x80080000 + 0x0)
#define HWT_ARC_BASE    HWIO_32_RW
#define HWN_ARC_BASE    ARC_BASE
#define HWI_ARC_BASE    

#define HW_ARC_ID   HW(ARC_ID)
#define HWA_ARC_ID  (0x80080000 + 0x0)
#define HWT_ARC_ID  HWIO_32_RW
#define HWN_ARC_ID  ARC_ID
#define HWI_ARC_ID  

#define HW_ARC_HCSPARAMS    HW(ARC_HCSPARAMS)
#define HWA_ARC_HCSPARAMS   (0x80080000 + 0x104)
#define HWT_ARC_HCSPARAMS   HWIO_32_RW
#define HWN_ARC_HCSPARAMS   ARC_HCSPARAMS
#define HWI_ARC_HCSPARAMS   

#define HW_ARC_USBCMD   HW(ARC_USBCMD)
#define HWA_ARC_USBCMD  (0x80080000 + 0x140)
#define HWT_ARC_USBCMD  HWIO_32_RW
#define HWN_ARC_USBCMD  ARC_USBCMD
#define HWI_ARC_USBCMD  

#define HW_ARC_USBSTS   HW(ARC_USBSTS)
#define HWA_ARC_USBSTS  (0x80080000 + 0x144)
#define HWT_ARC_USBSTS  HWIO_32_RW
#define HWN_ARC_USBSTS  ARC_USBSTS
#define HWI_ARC_USBSTS  

#define HW_ARC_USBINTR  HW(ARC_USBINTR)
#define HWA_ARC_USBINTR (0x80080000 + 0x148)
#define HWT_ARC_USBINTR HWIO_32_RW
#define HWN_ARC_USBINTR ARC_USBINTR
#define HWI_ARC_USBINTR 

#define HW_ARC_FRINDEX  HW(ARC_FRINDEX)
#define HWA_ARC_FRINDEX (0x80080000 + 0x14c)
#define HWT_ARC_FRINDEX HWIO_32_RW
#define HWN_ARC_FRINDEX ARC_FRINDEX
#define HWI_ARC_FRINDEX 

#define HW_ARC_DEVADDR  HW(ARC_DEVADDR)
#define HWA_ARC_DEVADDR (0x80080000 + 0x154)
#define HWT_ARC_DEVADDR HWIO_32_RW
#define HWN_ARC_DEVADDR ARC_DEVADDR
#define HWI_ARC_DEVADDR 

#define HW_ARC_ENDPTLISTADDR    HW(ARC_ENDPTLISTADDR)
#define HWA_ARC_ENDPTLISTADDR   (0x80080000 + 0x158)
#define HWT_ARC_ENDPTLISTADDR   HWIO_32_RW
#define HWN_ARC_ENDPTLISTADDR   ARC_ENDPTLISTADDR
#define HWI_ARC_ENDPTLISTADDR   

#define HW_ARC_PORTSC1  HW(ARC_PORTSC1)
#define HWA_ARC_PORTSC1 (0x80080000 + 0x184)
#define HWT_ARC_PORTSC1 HWIO_32_RW
#define HWN_ARC_PORTSC1 ARC_PORTSC1
#define HWI_ARC_PORTSC1 

#define HW_ARC_OTGSC    HW(ARC_OTGSC)
#define HWA_ARC_OTGSC   (0x80080000 + 0x1a4)
#define HWT_ARC_OTGSC   HWIO_32_RW
#define HWN_ARC_OTGSC   ARC_OTGSC
#define HWI_ARC_OTGSC   

#define HW_ARC_USBMODE  HW(ARC_USBMODE)
#define HWA_ARC_USBMODE (0x80080000 + 0x1a8)
#define HWT_ARC_USBMODE HWIO_32_RW
#define HWN_ARC_USBMODE ARC_USBMODE
#define HWI_ARC_USBMODE 

#define HW_ARC_ENDPTSETUPSTAT   HW(ARC_ENDPTSETUPSTAT)
#define HWA_ARC_ENDPTSETUPSTAT  (0x80080000 + 0x1ac)
#define HWT_ARC_ENDPTSETUPSTAT  HWIO_32_RW
#define HWN_ARC_ENDPTSETUPSTAT  ARC_ENDPTSETUPSTAT
#define HWI_ARC_ENDPTSETUPSTAT  

#define HW_ARC_ENDPTPRIME   HW(ARC_ENDPTPRIME)
#define HWA_ARC_ENDPTPRIME  (0x80080000 + 0x1b0)
#define HWT_ARC_ENDPTPRIME  HWIO_32_RW
#define HWN_ARC_ENDPTPRIME  ARC_ENDPTPRIME
#define HWI_ARC_ENDPTPRIME  

#define HW_ARC_ENDPTFLUSH   HW(ARC_ENDPTFLUSH)
#define HWA_ARC_ENDPTFLUSH  (0x80080000 + 0x1b4)
#define HWT_ARC_ENDPTFLUSH  HWIO_32_RW
#define HWN_ARC_ENDPTFLUSH  ARC_ENDPTFLUSH
#define HWI_ARC_ENDPTFLUSH  

#define HW_ARC_ENDPTSTATUS  HW(ARC_ENDPTSTATUS)
#define HWA_ARC_ENDPTSTATUS (0x80080000 + 0x1b8)
#define HWT_ARC_ENDPTSTATUS HWIO_32_RW
#define HWN_ARC_ENDPTSTATUS ARC_ENDPTSTATUS
#define HWI_ARC_ENDPTSTATUS 

#define HW_ARC_ENDPTCOMPLETE    HW(ARC_ENDPTCOMPLETE)
#define HWA_ARC_ENDPTCOMPLETE   (0x80080000 + 0x1bc)
#define HWT_ARC_ENDPTCOMPLETE   HWIO_32_RW
#define HWN_ARC_ENDPTCOMPLETE   ARC_ENDPTCOMPLETE
#define HWI_ARC_ENDPTCOMPLETE   

#define HW_ARC_ENDPTCTRL0   HW(ARC_ENDPTCTRL0)
#define HWA_ARC_ENDPTCTRL0  (0x80080000 + 0x1c0)
#define HWT_ARC_ENDPTCTRL0  HWIO_32_RW
#define HWN_ARC_ENDPTCTRL0  ARC_ENDPTCTRL0
#define HWI_ARC_ENDPTCTRL0  

#define HW_ARC_ENDPTCTRL1   HW(ARC_ENDPTCTRL1)
#define HWA_ARC_ENDPTCTRL1  (0x80080000 + 0x1c4)
#define HWT_ARC_ENDPTCTRL1  HWIO_32_RW
#define HWN_ARC_ENDPTCTRL1  ARC_ENDPTCTRL1
#define HWI_ARC_ENDPTCTRL1  

#define HW_ARC_ENDPTCTRL2   HW(ARC_ENDPTCTRL2)
#define HWA_ARC_ENDPTCTRL2  (0x80080000 + 0x1c8)
#define HWT_ARC_ENDPTCTRL2  HWIO_32_RW
#define HWN_ARC_ENDPTCTRL2  ARC_ENDPTCTRL2
#define HWI_ARC_ENDPTCTRL2  

#define HW_ARC_ENDPTCTRL3   HW(ARC_ENDPTCTRL3)
#define HWA_ARC_ENDPTCTRL3  (0x80080000 + 0x1cc)
#define HWT_ARC_ENDPTCTRL3  HWIO_32_RW
#define HWN_ARC_ENDPTCTRL3  ARC_ENDPTCTRL3
#define HWI_ARC_ENDPTCTRL3  

#define HW_ARC_ENDPTCTRL4   HW(ARC_ENDPTCTRL4)
#define HWA_ARC_ENDPTCTRL4  (0x80080000 + 0x1d0)
#define HWT_ARC_ENDPTCTRL4  HWIO_32_RW
#define HWN_ARC_ENDPTCTRL4  ARC_ENDPTCTRL4
#define HWI_ARC_ENDPTCTRL4  

#define HW_ARC_ENDPTCTRL5   HW(ARC_ENDPTCTRL5)
#define HWA_ARC_ENDPTCTRL5  (0x80080000 + 0x1d4)
#define HWT_ARC_ENDPTCTRL5  HWIO_32_RW
#define HWN_ARC_ENDPTCTRL5  ARC_ENDPTCTRL5
#define HWI_ARC_ENDPTCTRL5  

#define HW_ARC_ENDPTCTRL6   HW(ARC_ENDPTCTRL6)
#define HWA_ARC_ENDPTCTRL6  (0x80080000 + 0x1d8)
#define HWT_ARC_ENDPTCTRL6  HWIO_32_RW
#define HWN_ARC_ENDPTCTRL6  ARC_ENDPTCTRL6
#define HWI_ARC_ENDPTCTRL6  

#define HW_ARC_ENDPTCTRL7   HW(ARC_ENDPTCTRL7)
#define HWA_ARC_ENDPTCTRL7  (0x80080000 + 0x1dc)
#define HWT_ARC_ENDPTCTRL7  HWIO_32_RW
#define HWN_ARC_ENDPTCTRL7  ARC_ENDPTCTRL7
#define HWI_ARC_ENDPTCTRL7  

#define HW_ARC_ENDPTCTRL8   HW(ARC_ENDPTCTRL8)
#define HWA_ARC_ENDPTCTRL8  (0x80080000 + 0x1e0)
#define HWT_ARC_ENDPTCTRL8  HWIO_32_RW
#define HWN_ARC_ENDPTCTRL8  ARC_ENDPTCTRL8
#define HWI_ARC_ENDPTCTRL8  

#define HW_ARC_ENDPTCTRL9   HW(ARC_ENDPTCTRL9)
#define HWA_ARC_ENDPTCTRL9  (0x80080000 + 0x1e4)
#define HWT_ARC_ENDPTCTRL9  HWIO_32_RW
#define HWN_ARC_ENDPTCTRL9  ARC_ENDPTCTRL9
#define HWI_ARC_ENDPTCTRL9  

#define HW_ARC_ENDPTCTRL10  HW(ARC_ENDPTCTRL10)
#define HWA_ARC_ENDPTCTRL10 (0x80080000 + 0x1e8)
#define HWT_ARC_ENDPTCTRL10 HWIO_32_RW
#define HWN_ARC_ENDPTCTRL10 ARC_ENDPTCTRL10
#define HWI_ARC_ENDPTCTRL10 

#define HW_ARC_ENDPTCTRL11  HW(ARC_ENDPTCTRL11)
#define HWA_ARC_ENDPTCTRL11 (0x80080000 + 0x1ec)
#define HWT_ARC_ENDPTCTRL11 HWIO_32_RW
#define HWN_ARC_ENDPTCTRL11 ARC_ENDPTCTRL11
#define HWI_ARC_ENDPTCTRL11 

#define HW_ARC_ENDPTCTRL12  HW(ARC_ENDPTCTRL12)
#define HWA_ARC_ENDPTCTRL12 (0x80080000 + 0x1f0)
#define HWT_ARC_ENDPTCTRL12 HWIO_32_RW
#define HWN_ARC_ENDPTCTRL12 ARC_ENDPTCTRL12
#define HWI_ARC_ENDPTCTRL12 

#define HW_ARC_ENDPTCTRL13  HW(ARC_ENDPTCTRL13)
#define HWA_ARC_ENDPTCTRL13 (0x80080000 + 0x1f4)
#define HWT_ARC_ENDPTCTRL13 HWIO_32_RW
#define HWN_ARC_ENDPTCTRL13 ARC_ENDPTCTRL13
#define HWI_ARC_ENDPTCTRL13 

#define HW_ARC_ENDPTCTRL14  HW(ARC_ENDPTCTRL14)
#define HWA_ARC_ENDPTCTRL14 (0x80080000 + 0x1f8)
#define HWT_ARC_ENDPTCTRL14 HWIO_32_RW
#define HWN_ARC_ENDPTCTRL14 ARC_ENDPTCTRL14
#define HWI_ARC_ENDPTCTRL14 

#define HW_ARC_ENDPTCTRL15  HW(ARC_ENDPTCTRL15)
#define HWA_ARC_ENDPTCTRL15 (0x80080000 + 0x1fc)
#define HWT_ARC_ENDPTCTRL15 HWIO_32_RW
#define HWN_ARC_ENDPTCTRL15 ARC_ENDPTCTRL15
#define HWI_ARC_ENDPTCTRL15 

#define HW_ARC_ENDPTCTRLn(_n1)  HW(ARC_ENDPTCTRLn(_n1))
#define HWA_ARC_ENDPTCTRLn(_n1) (0x80080000 + 0x1c0 + (_n1) * 0x4)
#define HWT_ARC_ENDPTCTRLn(_n1) HWIO_32_RW
#define HWN_ARC_ENDPTCTRLn(_n1) ARC_ENDPTCTRLn
#define HWI_ARC_ENDPTCTRLn(_n1) (_n1)

#endif /* __HEADERGEN_STMP3600_ARC_H__*/
